Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation
Reexamination Certificate
2006-06-20
2006-06-20
Nguyen, Linh My (Department: 2816)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Tuning compensation
C327S147000
Reexamination Certificate
active
07064617
ABSTRACT:
Temperature compensation is achieved by adjusting a divide ratio of a multi-modulus divider circuit in a feedback path of a phase-locked loop based on the detected temperature. The divide ratio is adjusted based on stored adjustment values stored in non-volatile memory. Interpolation may be used to interpolate between the stored adjustment values.
REFERENCES:
patent: 3676801 (1972-07-01), Musa
patent: 3719838 (1973-03-01), Peduto et al.
patent: 3813610 (1974-05-01), Kimura
patent: 3887941 (1975-06-01), Dann et al.
patent: 4038612 (1977-07-01), Borofka et al.
patent: 4135158 (1979-01-01), Parmet
patent: 4380745 (1983-04-01), Barlow et al.
patent: 4446446 (1984-05-01), Fowks
patent: 4485818 (1984-12-01), Leckrone et al.
patent: 4580107 (1986-04-01), Caldwell et al.
patent: 4598257 (1986-07-01), Southard
patent: 4683445 (1987-07-01), Erickson
patent: 4689581 (1987-08-01), Talbot
patent: 4827226 (1989-05-01), Connell
patent: 4847888 (1989-07-01), Cox et al.
patent: 4859968 (1989-08-01), Gershon
patent: 4891825 (1990-01-01), Hansen
patent: 4931748 (1990-06-01), McDermott et al.
patent: 4940950 (1990-07-01), Helfrick
patent: 4967165 (1990-10-01), Lee et al.
patent: 4969210 (1990-11-01), Hansen et al.
patent: 4996608 (1991-02-01), Widney
patent: 5038117 (1991-08-01), Miller
patent: 5041800 (1991-08-01), Long et al.
patent: 5081431 (1992-01-01), Kubo et al.
patent: 5099153 (1992-03-01), Adams
patent: 5144254 (1992-09-01), Wilke
patent: 5179359 (1993-01-01), McLeod
patent: 5180992 (1993-01-01), Akiyama et al.
patent: 5233351 (1993-08-01), Gregory et al.
patent: 5254958 (1993-10-01), Flach et al.
patent: 5257294 (1993-10-01), Pinto et al.
patent: 5259007 (1993-11-01), Yamamoto
patent: 5263197 (1993-11-01), Manjo et al.
patent: 5266908 (1993-11-01), Koulopoulos et al.
patent: 5319324 (1994-06-01), Satoh et al.
patent: 5337024 (1994-08-01), Collins
patent: 5349544 (1994-09-01), Wright et al.
patent: 5416443 (1995-05-01), Cranford, Jr. et al.
patent: 5416446 (1995-05-01), Holler, Jr. et al.
patent: 5425074 (1995-06-01), Wong
patent: 5428319 (1995-06-01), Marvin et al.
patent: 5448204 (1995-09-01), Gardner
patent: 5451912 (1995-09-01), Torode
patent: 5471661 (1995-11-01), Atkinson
patent: 5473289 (1995-12-01), Ishizaki et al.
patent: 5473758 (1995-12-01), Allen et al.
patent: 5485127 (1996-01-01), Bertoluzzi et al.
patent: 5574408 (1996-11-01), Zwack
patent: 5579348 (1996-11-01), Walker et al.
patent: 5604468 (1997-02-01), Gillig
patent: 5781044 (1998-07-01), Riley et al.
patent: 5781054 (1998-07-01), Lee
patent: 5790614 (1998-08-01), Powell
patent: 5834987 (1998-11-01), Dent
patent: 5847611 (1998-12-01), Hirata
patent: 5952890 (1999-09-01), Fallisgaard et al.
patent: 6008703 (1999-12-01), Perrott et al.
patent: 6044124 (2000-03-01), Monahan et al.
patent: 6061418 (2000-05-01), Hassoun
patent: 6091943 (2000-07-01), Nyenhuis
patent: 6236703 (2001-05-01), Riley
patent: 6404246 (2002-06-01), Estakhri et al.
patent: 6456164 (2002-09-01), Fan
patent: 6509800 (2003-01-01), Stockton
patent: 6515553 (2003-02-01), Filiol et al.
patent: 6570453 (2003-05-01), Su et al.
patent: 6617893 (2003-09-01), Born et al.
patent: 6618462 (2003-09-01), Ross et al.
patent: 6670854 (2003-12-01), Takeda et al.
patent: 6683932 (2004-01-01), Wood
patent: 6807552 (2004-10-01), Bredin et al.
patent: 6917317 (2005-07-01), Nagaso et al.
patent: 6930519 (2005-08-01), Fallahi et al.
patent: 2002/0140512 (2002-10-01), Stockton
patent: 2002/0190764 (2002-12-01), Nichols
patent: 2004/0222856 (2004-11-01), Hein
patent: 2004/0232995 (2004-11-01), Thomsen et al.
patent: 2004/0246809 (2004-12-01), Sutardja
patent: 2005/0068118 (2005-03-01), Hein
patent: 2005/0212570 (2005-09-01), Sun et al.
patent: 2005/0242848 (2005-11-01), Sun et al.
patent: 0 239 412 (1987-09-01), None
patent: 0 393 975 (1990-10-01), None
patent: 0 402 736 (1990-12-01), None
patent: 0 601 780 (1994-06-01), None
patent: 1 345 375 (2003-09-01), None
patent: 02-291161 (1990-11-01), None
patent: 03-297223 (1991-12-01), None
patent: WO 85/02966 (1985-07-01), None
De Muer, Bram, and Steyaert, Michel S. J., “A CMOS Monolithic ΔΣ-Controlled Fractional-N Frequency Synthesizer for DCS-1800,” IEEE Journal of Solid-State Circuits, vol. 37, No. 7, Jul. 2002, pp. 835-844.
Pamarti, Sudhakar, et al., “A Wideband 2.4-GHz Delta-Sigma Fractional-N PLL With 1-Mb/s In-Loop Modulation,” IEEE Journal of Solid-State Circuits, vol. 39, No. 1, Jan. 2004, pp. 49-62.
Riley, Tom A. D., et al., “Delta-Sigma Modulation in Fractional-N Frequency Synthesis,” IEEE Journal of Solid-State Circuits, vol. 28, No. 5, May 1993, pp. 553-559.
U.S. Appl. No. 11/270,954, filed Nov. 10, 2005, Thomsen et al.
U.S. Appl. No. 11/270,957, filed Nov. 10, 2005, Thomsen et al.
Craninckx, Jan and Steyaert, Michiel S. J., “A 1.75-GHz/3-V Dual-Modulus Divide-by-128/129 Prescaler in 0.7-μm CMOS,” IEEE Journal of Solid-State Circuits, vol. 31, No. 7, Jul. 1996, pp. 890-897.
CYPRESS Semiconductor Corporation, “Cypress 1 PLL In-System Programmable Clock Generator with Individual 16K EEPROM,” Dec. 14, 2002, 18 pages.
Encinas, J. B., “Phase Locked Loops,” Chapman & Hall, 1993, pp. 144-158.
Fox Electronics, “F6233 Quick Delivery Oscillator,” 1 page (from file history of US Patent 5,962,890).
Gardner, Floyd M., “Phaselock Techniques,” Second Edition, John Wiley & Sons, 1979, pp. 2-5.
Gaskell, Tom, “Semiconductor Circuits Programmable Crystal Oscillator (PX0-600),” Practical Electronics, Jul. 1983, pp. 40-43.
Giles, T. G., “A Universal Frequency Synthesizer IC,” Philips Telecommunication Review, vol. 37, No. 3, Aug. 1979, pp. 177-181.
Goto, Junichi, et al., “A Programmable Clock Generator With 50 to 350 MHz Lock Range For Video Signal Processors,” IEEE 1993 Custom Integrated Circuits Conference, pp. 4.4.1-4.4.2.
IC Designs, “IC Designs Introduces Trio of Parts Aimed at Replacing Crystal Oscillators in Personal Computer Graphics Board Designs,” News Release, May 9, 1990, 1 page.
IC Designs, “Dual Programmable Clock Oscillator,” Model No. ICD2051, V2.0, May 1991, pp. 1-12.
IC Designs, “Dual Programmable ECL/TTL Clock Generator,” Model No. ICD2062B, prior to 1995, 1 page.
IC Designs, “Frequency Multiplier,” Model No. ICD2032 Preliminary Data Sheet, V2.0, May 1991, pp. 1-7.
IC Designs, “Programmable Clock Oscillator,” Model No. ICD2053A Programmable Products, V1.0, prior to 1995, 14 pages.
IC Designs, “Satellite Oscillator,” Model No. ICD2031A Preliminary Data Sheet, V2.0, May 1991, pp. 1-8.
Krishnapura, Nagendra and Kinget, Peter R., “A 5.3-GHz Programmable Divider for HiPerLAN in 0.25-μm CMOS,” IEEE Journal of Solid-State Circuits, vol. 35, No. 7, Jul. 2000, pp. 1019-1024.
Lovelock, Peter A., “Build This Programmable Crystal-Controlled Pulse Generator,” Radio Electronics, Jun. 1990, pp. 47-50.
M-Tron, “MT1135 Series Dual Baud Rate Generators,” 1987, 3 pages.
Perrott, Michael H., et al., “A 27-mW CMOS Fractional-N Synthesizer Using Digital Compensation for 2.5-MB/s GFSK Modulation,” IEEE Journal of Solid-State Circuits, vol. 32, No. 12, Dec. 1997, pp. 2048-2060.
Perrott, Michael H., “Techniques for High Data Rate Modulation and Low Power Operation of Fractional-N Frequency Synthesizers,” Dissertation, Massachusetts Institute of Technology, Sep. 1997, pp. 1-199.
PHILIPS Semiconductors, Product Specification Data Sheet, HEF4017B, MSI, 5-Stage Johnson Counter, Jan. 1995.
Sumi, Yasuaki, et al., “Novel Fractional-N PLL Frequency Synthesizer with Reduced Phase Error,” Proceedings of IEEE Asia Pacific Conference on Circuits and Systems '96, Nov. 18-21, 1996, Seoul, Korea, pp. 45-48.
Epson, “Programmable Multi-Output Crystal Oscillator MG-5010,” Mar. 7, 1993, 3 pages.
Foord, A., “Voltage Controlled Oscillator,” Radio & Electronics Constructor, May 1975m
Hein Jerrell P.
Thomsen Axel
Nguyen Linh My
Silicon Laboratories Inc.
Zagorin O'Brien Graham LLP
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