Method and apparatus for synthesizing a clock signal using a...

Details Method and apparatus for synthesizing a clock signal using a... Method and apparatus for synthesizing a clock signal using a...

2006-02-21

2006-02-21

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S153000

Reexamination Certificate

active

07002383

ABSTRACT:
A method and apparatus are disclosed for efficiently doubling a first frequency of a first clock signal. A second clock signal at a second frequency is generated by dividing the first frequency of the first clock signal by two, such that the second frequency is half of the first frequency and a duty cycle of the second clock signal is 50%. Also, a set of phase-delayed clock signals is generated in response to the second clock signal such that the set of phase-delayed clock signals are delayed in phase with respect to the second clock signal. Further, the set of phase-delayed clock signals is combined to generate a third clock signal at a third frequency, such that the third frequency is twice that of the first frequency and a duty cycle of the third clock signal is 50%.

REFERENCES:
patent: 3993957 (1976-11-01), Davenport
patent: 5526361 (1996-06-01), Hedberg
patent: 6150855 (2000-11-01), Marbot

Affiliated with

Also associated with

Rating

Method and apparatus for synthesizing a clock signal using a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for synthesizing a clock signal using a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for synthesizing a clock signal using a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3682038