Method and apparatus for synthesizing a clock signal having...

Details Method and apparatus for synthesizing a clock signal having... Method and apparatus for synthesizing a clock signal having...

2008-01-29

2008-01-29

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S156000, C331S034000

Reexamination Certificate

active

07323917

ABSTRACT:
An apparatus and method of synthesizing an output clock signal from a source clock signal. The clock synthesizer includes a phase generator, a phase selector, a phase interpolator, and control circuitry for controlling the phase selector/interpolator. The phase generator receives a high speed clock, and generates P phases of the source clock to define P phase sectors. The phase selector selects respective pairs of phases such that each pair bounds a respective phase sector. The phase interpolator introduces at least one phase of the source clock between each pair of phases to provide Q phases of the source clock within each sector. The phase interpolator uses the phases of the source clock to produce lagging (leading) phase shifts of 360/P(Q−1) degrees, thereby generating the output clock having a stepped up or stepped down frequency.

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ECE1352 Analog Integrated Circuits Reading Assignment: Phase Interpolating Circuits, Kostas Pagiamtzis, Nov. 12, 2001, pp. 1-19.

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