Pulse or digital communications – Synchronizers – Synchronization failure prevention
Patent
1995-07-10
1999-01-05
Pham, Chi H.
Pulse or digital communications
Synchronizers
Synchronization failure prevention
375360, 326 93, 327145, 327153, 327292, 36518905, H04L 704
Patent
active
058570055
ABSTRACT:
The present invention is directed to a method and apparatus for synchronizing one or more data signal lines of a data bus to multiple clocks, and for guaranteeing the validity of the synchronized values. Exemplary embodiments avoid the need to eliminate delays between the asynchronous clocks. Thus, exemplary embodiments of the present invention can be used for reliably synchronizing the in-pointer and out-pointer of a first-in first-out memory.
REFERENCES:
patent: 5388074 (1995-02-01), Buckenmaier
Luther William
Pham Chi H.
VLSI Technology Inc.
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