Method and apparatus for synchronizing the timing subsystems of

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3408255, G06F 900

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active

047093471

ABSTRACT:
Method and apparatus for synchronizing to a desired degree of accuracy the timing subsystems of the modules of a distributed local area network by the master and the slave. Each module includes a Module Central Processing Unit (MCPU) and a source of clock signals. Each MCPU includes a digital timing subsystem which produces a fine timing, a synchronization, and a real time timing signal. Two of the timing subsystems are provided with driver circuits one designated as the master and the other as the slave. Each timing subsystem, alternately receives the timing frames transmitted over the two cables of the network by the master and the slave. All timing subsystems other than the master, synchronize with the master. The slave transmits its timing frame in synchronization with the master.

REFERENCES:
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patent: 4410889 (1983-10-01), Bryant et al.
patent: 4430651 (1984-02-01), Bryant et al.
patent: 4493021 (1985-01-01), Agrawal et al.
patent: 4570162 (1986-02-01), Boulton et al.

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