Method and apparatus for synchronizing clock signals

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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377 39, H03L 700

Patent

active

059260483

ABSTRACT:
A method and apparatus for synchronizing clock signals on first and second logic blocks connected via an asynchronous bus, wherein the second logic block includes a clock signal generator. The method comprises causing the clock signal on the first logic block to increment a first count; causing the clock signal on the second logic block to increment a second count; comparing the first and second counts; and adjusting the clock signal on the second logic block in response to the result of the comparison to synchronize the two clock signals, wherein the transfer of information between the logic blocks is carried out via the asynchronous bus.

REFERENCES:
patent: 4171538 (1979-10-01), Sheller
patent: 4280099 (1981-07-01), Rattlingourd
patent: 5442310 (1995-08-01), Bazes
patent: 5459435 (1995-10-01), Taki
patent: 5506809 (1996-04-01), Csoppenszky et al.
patent: 5594763 (1997-01-01), Nimishakavi

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