Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1975-10-31
1977-11-22
Martin, John C.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
331 18, 331 20, 328 48, 328 63, H04N 506, H03F 342, H03F 368, H03K 117
Patent
active
040598420
ABSTRACT:
A method and apparatus for synchronization of a digital divider chain with a low frequency reference pulse train is embodied in the form of all digital circuit apparatus suitable for fabrication by state of the art high density packaging techniques such as Large Scale Integration (LSI) or Multi-chip Hybrid Packaging (MHP). Each individual substage of the divider chain is reset to its ZERO condition by a circuit including first and second flip-flops which receives inputs from the master oscillator clock driving the divider chain and from the source of the low frequency reference pulse train.
REFERENCES:
patent: 3271688 (1966-09-01), Gschwind et al.
patent: 3688037 (1972-08-01), Ipri
patent: 3878335 (1975-04-01), Balaban
patent: 3894246 (1975-07-01), Torgrim
patent: 3916102 (1975-10-01), Merrell
Dryer et al., "Signal Synchronizer", IBM Technical Disclosure Bulletin, vol. 10, No. 9, Feb. 1968, p. 1352.
Day, "Synchronizable Clock", IBM Technical Disclosure Bulletin, vol. 4, No. 11, Apr. 1962, p. 42.
Martin John C.
Renz C. F.
Westinghouse Electric Corporation
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