Amplifiers – Combined with automatic amplifier disabling switch means
Reexamination Certificate
2000-06-08
2002-04-30
Pascal, Robert (Department: 2817)
Amplifiers
Combined with automatic amplifier disabling switch means
C330S150000, C330S280000, C330S133000, C330S134000
Reexamination Certificate
active
06380804
ABSTRACT:
BACKGROUND
This invention relates generally to a method and apparatus for switching stages in a multistage amplifier. More specifically, this invention relates to a method and apparatus for switching stages of a multistage amplifier quickly between operational modes.
In multistage amplifier designs, e.g., multistage bipolar amplifier designs, it is difficult to switch between modes such as normal and standby (low power) modes quickly without generating excessive output transient voltages. Depending on the sequence in which the stages are turned ON or OFF, excessive recovery time can result from the saturation of one or more stages during the transition time. Also, any output voltage shifts or transients can have undesirable effects on circuitry connected to the output of the amplifier. If all of the stages are turned OFF during the standby mode, the amplifier output will not remain in its normal low impedance state. Thus, the output of the final stage may take a while to settle, which may have an adverse effect on circuitry following the final amplifier stage, e.g., when the output is AC-coupled to the following circuitry. Alternately, if the output stage remains ON while the preceding stages are turned OFF, the output stage will generally be saturated when its input (the output of the preceding stage) is pulled up towards the positive supply. In addition, this design suffers from excessive turn-on recovery time. Neither of these designs is acceptable in many of today's designs for applications such as high-end preamplifiers.
U.S. Pat. No. 5,446,601 describes a circuit in which recovery time in a read-write amplifier is minimized by switching the output into a high impedance state for a predetermined time in order to inhibit any switching transient from reaching the output. This option is not acceptable in cases where it is required that the output maintain a low impedance. Also, this option may not be effective for cases requiring recovery times much faster than a few hundred nanoseconds.
U.S. Pat. No. 5,166,638 discloses an amplifier having an output stage that is quickly made inactive by a control signal. This patent specifically addresses only the transition time from an active mode to an inactive mode for a differential-in, single-ended-out amplifier stage.
None of the prior art addresses the problem of quickly switching multiple amplifier stages between operational modes, e.g., from a standby mode to an active mode. This problem must be addressed in order to meet the mode-switching requirements of today's designs for applications such as high-end preamplifier.
There is thus a need for a technique for switching multiple amplifier stages quickly between operational modes, without generating output transient voltages.
SUMMARY
It is therefore an object of the present invention to provide a technique for quickly switching multiple amplifier stages between operational modes, e.g., from a standby mode to an active mode, while avoiding output transients.
According to an exemplary embodiment, this and other objects are met by a method and apparatus for switching multiple amplifier stages between operational modes. The delivery of a control signal to each individual stage is delayed by a delay unit so that the modes of the stages are switched in a desired sequence. The final amplifier stage is isolated from the operational mode switching of the preceding stages by a buffer. For switching the multistage amplifier from the standby mode to the active mode, the buffer and stages preceding the final stage are turned on, in a desired sequence, beginning with the first stage and ending with the buffer. For switching the multistage amplifier from the active mode to the standby mode, the buffer and the stages preceding the final stage are turned off, in a desired sequence, beginning with the buffer and ending with the first stage. The delay unit includes a plurality of delay units, one connected to each amplifier stage except the final amplifier stage. A delay unit is also connected to the buffer isolating the final amplifier stage.
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patent: 5166638 (1992-11-01), Koga
patent: 5446601 (1995-08-01), Fukuta
patent: 5548453 (1996-08-01), Sasaki et al.
patent: 5608350 (1997-03-01), Ebukuro
patent: 6175278 (2001-01-01), Hasegawa
patent: 0 600 515 (1994-06-01), None
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Burns Doane , Swecker, Mathis LLP
Mitsubishi Electric & Electronics U.S.A.
Nguyen Patricia
Pascal Robert
LandOfFree
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