Pulse or digital communications – Synchronizers – Synchronization failure prevention
Patent
1994-06-06
1996-06-25
Chin, Stephen
Pulse or digital communications
Synchronizers
Synchronization failure prevention
327292, 327293, 327298, 331 49, H04L 700
Patent
active
055307264
ABSTRACT:
A duplexed clock switching apparatus of the present invention includes two oscillators constantly working for outputting clock signals, wherein a phase of the stand-by clock signal is kept synchronized to the phase of the clock signal selected from the output signal of the oscillator to be supplied to the apparatus. Each of the duplexed clock switching apparatus of the present invention includes a clock signal generator for generating clock signals of a predetermined frequency independently; a clock selector for receiving clock signals generated by all clock signal generators and selecting one of them; a phase synchronization circuit for synchronizing a phase of a clock signal generated by the clock signal generator to the phase of the selected clock signal; and a clock switching circuit for switching an outputted clock signal to the selected clock signal. With reference to the phase synchronization circuit, it is desirable to include a phase-locked-loop (PLL) circuit.
REFERENCES:
patent: 4899351 (1990-02-01), Bonke
patent: 5052030 (1991-09-01), Ernst et al.
patent: 5059925 (1991-10-01), Weisbloom
patent: 5355090 (1994-10-01), Pajowski et al.
patent: 5422915 (1995-06-01), Byers et al.
Chin Stephen
Le Amanda T.
NEC Corporation
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