Multiplex communications – Wide area network – Packet switching
Patent
1988-01-14
1989-08-29
Griffin, Robert L.
Multiplex communications
Wide area network
Packet switching
370 85, H04Q 1104
Patent
active
048624519
ABSTRACT:
In a switching exchange for circuit-switched/synchronous traffic (CS) and packet-switched/asynchronous data packet traffic (PS), transmission lines communicate with FIFO buffers interconnected by a data bus on which information is transferred in periodic frames. CS traffic is collected in FIFO input buffers in minipackets each carrying a local routing address. The last minipacket per frame period is identified by a special end tag. Once per frame a daisy-chain signal propagates through access control lines to sequentially read out from FIFO input buffers all CS minipackets up to the next one having a special end tag, transferring them through the data bus to FIFO output buffers. Thereafter a token access mechanism starts enabling selective PS data packet transfer between FIFO input and output buffers. When a new frame begins, and PS data packet transfer is interrupted for a CS minipacket readout process, and thereafter transfer of the interrupted PS packet is resumed.
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Goeldner, "An Integrated Circuit/Packet Switching Local Area Network-Performance Analysis and Comparison of Strategies", Computer Networks and ISDN Systems, vol. 10, No. 3/4, Oct./Nov. 1985, pp. 211-219.
Closs Felix H.
Mueller Johann R.
Zafiropulo Pitro A.
Griffin Robert L.
International Business Machines - Corporation
Klitzman M. H.
Scutch III Frank M.
Seinberg S. A.
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