Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Patent
1989-01-31
1990-08-21
Shoop, Jr., William M.
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
341135, 341155, 341172, H03M 112
Patent
active
049510533
ABSTRACT:
An arrangement of switches and resistors for switching current into the summing node of an integrator uses a pair of switches for each resistor. Each resistor is connected at one end to a reference voltage. The other end of the resistor is connected to a first switch, which is in turn connected to the summing node. A second switch is connected between ground and the junction of the resistor and the first switch. One or the other of the two switches will always be on. When the first switch is on and the second one is off a current will flow from the reference voltage, through the resistor and into the summing node. When the first switch is off and the second one is on essentially the same current will flow from the reference voltage, through the resistor and into ground. The current will be nearly the same, since the virtual ground of the integrator approximates actual ground. This stabilizes the value of the reistor by keeping the power dissipation therein almost exactly constant, and elminates load induced fluctuations in the reference voltage. It also allows each resistor to be disconnected from the summing node, by turning each associated first switch off and each associated second switch on. Under these circumstances no appreciable current from the resistors flows into the summing junction, by virtue of the switches themselves, and without resort to precision cancellation of opposing currents, as in some prior art switching schemes. This feature allows the connection of multiple instances of switched resistor networks to the summing node. One network switched resistors can be put to use while all the others are disconnected.
REFERENCES:
patent: 3818246 (1974-06-01), Hellwarth et al.
patent: 3918050 (1975-11-01), Dorsman
patent: 4112428 (1978-09-01), Dorsman
patent: 4357600 (1982-11-01), Ressmeyer et al.
patent: 4574271 (1986-03-01), Yada
patent: 4598270 (1986-07-01), Shutt et al.
patent: 4745395 (1988-05-01), Robinson
patent: 4876544 (1989-10-01), Kuraishi
DesJardin Lawrence A.
Goeke Wayne C.
Hewlett--Packard Company
Miller Edward L.
Romano Gary J.
Shoop Jr. William M.
LandOfFree
Method and apparatus for switching currents into the summing nod does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for switching currents into the summing nod, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for switching currents into the summing nod will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1681543