Method and apparatus for switching amplification having...

Details Method and apparatus for switching amplification having... Method and apparatus for switching amplification having...

2005-07-26

2005-07-26

Nguyen, Khanh V. (Department: 2817)

Amplifiers

Modulator-demodulator-type amplifier

C330S20700P

Reexamination Certificate

active

06922100

ABSTRACT:
Disclosed is a method and/or apparatus for adjusting the sample time and order associated with a digital correction system for maximizing output power and minimizing power stage delay sensitivity of a switching power stage. In certain embodiments, the sample point of an ADC may be changed as a function of the duty ratio of the PWM signal thus allowing higher performance and use of less expensive power stage components. In addition, adjustment of the order of an integrating error amplifier in the system permits operation of the power stage with an output being permitted to saturate up to the power supply rails, thus increasing a power output of the power stage.

REFERENCES:
patent: 6414613 (2002-07-01), Midya et al.
patent: 6466087 (2002-10-01), Ruha
patent: 6504427 (2003-01-01), Midya et al.
patent: 6549085 (2003-04-01), Wagh et al.
patent: 6768779 (2004-07-01), Nielsen
patent: 2003/0042976 (2003-03-01), Midya et al.

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