Method and apparatus for suspending and restarting a bus cycle

Details Method and apparatus for suspending and restarting a bus cycle Method and apparatus for suspending and restarting a bus cycle

1991-07-31

1992-09-22

Kriess, Kevin A.

Boots, shoes, and leggings

364DIG1, 364240, G06F 1338

Patent

active

051504677

ABSTRACT:
In a system which includes a processor which executes bus cycles on a bus and in which a signal is sent back to the processor indicative of completion of a bus cycle, completion of the cycle is suspended and then restarted by storing the address, deasserting control signals, isolating the processor from the bus, and delaying issuance of the signal indicative of completion of the bus cycle. Subsequently the cycle is restarted by connecting the processor to the bus, reissuing the address and control signals from a PAL and allowing the normal completion of the cycle.

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