Excavating
Patent
1991-09-05
1993-11-30
Nguyen, Hoa T.
Excavating
371 102, 371 373, G06F 1100
Patent
active
052672425
ABSTRACT:
A computer memory maintainence apparatus tests operating system storage and identifies a malfunctioning memory chip in an on-line memory array by detecting and recording all permanent data errors using data comparison along with data complementation and substitutes a spare memory chip for the malfunctioning one for all memory read commands. All write commands are performed on both spare memory and the malfunctioning memory chip. All contents of defective chip are copied to the spare chip. The computer system maintains the scrubbing and a recording counter for each of the data bits in an ECC memory data word. The sparing logic in the memory storage system maintains the bit steering logic and controls for the spare chip. When a counter is incremented above a threshold sparing is invoked to replace the failing bit position. The system writes to the defective and spare chips in parallel even after bit steering is invoked.
REFERENCES:
patent: 4231089 (1980-10-01), Lewine et al.
patent: 4296494 (1981-10-01), Ishikawa et al.
patent: 4371754 (1983-02-01), De et al.
patent: 4458349 (1984-07-01), Aichelmann et al.
patent: 4532628 (1985-07-01), Matthews
patent: 4584682 (1986-04-01), Shah et al.
patent: 4872166 (1989-10-01), Jippo
patent: 4888773 (1989-12-01), Arlington et al.
patent: 5077737 (1991-12-01), Leger et al.
Research Disclosure, Mar. 1991, #323-"Memory On-Chip Complement/Recomplement" by A. Brearley et al.
Research Disclosure Jul. 1990, #315-"Revised Complement/Recomplement with On-Chip Error Correction" by A. Brearley et al.
IBM TDB-vol. 32, No. 4B, Sep. 1989-"Hardware Mechanism To . . . Memory Error", by W. Hardell et al. p. 241.
IBM TDB vol. 32, No. 4B, Sep. 1989-"Capability To Steer a Bit Without . . . Soft Error"-by W. Hardell et al.-p. 249.
IBM TDB-vol. 29, No. 7, Dec. 1986-"Dynamic Sparing of Storage Modules" by R. Fuqua et al.-pp. 2828-2829.
IBM TDB-vol. 28, No. 11, Apr. 1986-"Intermittent Array Failure Identification" by J. Datres et al., p. 4796.
IBM TDB-vol. 28, No. 5, Oct. 1985-"Error Handling During Interleaved Memory Operations"-by Beacom et al., pp. 2001-2004.
IBM TDB-vol. 24, No. 6, Nov. 1981-"Multiple Memory Error Correction"-by J. Datres et al.-p. 2690.
IBM TDB-vol. 13, No. 8, Jan. 1971-"Multiple Error Correction"-by B. Bachman et al.-p. 2190.
LaVallee Russell W.
O'Brien Donald G.
Rubino Michael
Shen William W.
Wellwood George C.
Augspurger Lynn L.
International Business Machines - Corporation
Nguyen Hoa T.
LandOfFree
Method and apparatus for substituting spare memory chip for malf does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for substituting spare memory chip for malf, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for substituting spare memory chip for malf will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2103354