Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1991-05-16
1992-12-08
Groody, James J.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358160, 340799, H04N 701, H04N 516
Patent
active
051702517
ABSTRACT:
A method and apparatus in which data defining a high definition video frame are written into a memory in a manner so that the data can be linearly accessed from the memory in a selected (interlaced or progressive) format. In a preferred embodiment in which the data are written into a two megabyte memory in blocks of 128 pixels, with a 14-bit address for each block, the invention enables SMPTE-240M format high definition video data to be written into memory in a manner so that the data can be linearly accessed from memory in either an interlaced format or a progressive format. In an embodiment for storing (1920.times.1080)=2,073,600 pixels defining a high definition video frame, the apparatus of the invention includes a two megabyte memory and a thirty-two kilobyte PROM (or PAL) circuit. The thirty-two kilobyte circuit implements two look-up tables, each having a size of 16,384 bytes. In an interlace storage mode, the apparatus employs a first one of the look-up tables to assign interlaced format memory addresses to the pixel blocks being written into memory (so that the data can be linearly accessed from memory in interlaced format). In a progressive storage mode, the apparatus employs the other look-up table to assign "progressive format" memory addresses to the pixel blocks being written into memory (so that the data can be linearly accessed from memory in progressive format).
REFERENCES:
patent: 4368466 (1983-01-01), Dwire
patent: 4396938 (1983-08-01), Dischert
patent: 4617564 (1986-10-01), Yoshioka
patent: 4951042 (1990-08-01), Belch
patent: 4956708 (1990-09-01), Itagaki
Groody James J.
Metjahic S.
Sony Corporation of America
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