Method and apparatus for single step clocking on signal paths lo

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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371 61, 328 63, 328 72, 307480, G06F 1130

Patent

active

050557076

ABSTRACT:
An apparatus and method allows for starting and stopping of computer system clocks where the propagation length of signal paths exceed one clock cycle in length. A circular source buffer is provided at the source end of a signal path and saves the data presented on the signal path during every clock cycle. When the system clock has been stopped and is to be restarted, the data stored in the source buffer is copied to a corresponding destination buffer located in the destination end of the signal path. A multiplexer under hardware control located at the destination end of the signal path determines whether the destination receives data from the destination buffer or from the signal path.

REFERENCES:
patent: 4458307 (1984-07-01), McAnlis et al.
patent: 4819154 (1989-04-01), Stiffler et al.
patent: 4847749 (1989-07-01), Collins et al.
patent: 4982404 (1991-01-01), Hartman

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