Data processing: software development – installation – and managem – Software program development tool – Translation of code
Reexamination Certificate
2006-07-18
2006-07-18
Dam, Tuan (Department: 2192)
Data processing: software development, installation, and managem
Software program development tool
Translation of code
C716S030000, C703S015000
Reexamination Certificate
active
07080365
ABSTRACT:
A method for compiling a cycle-based design involves generating a parsed cycle-based design from the cycle-based design, elaborating the parsed cycle-based design to an annotated syntax tree, translating the annotated syntax tree to an intermediate form, and converting the intermediate form to an executable form.
REFERENCES:
patent: 4885684 (1989-12-01), Austin et al.
patent: 5274818 (1993-12-01), Vasilevsky et al.
patent: 5960171 (1999-09-01), Rotman et al.
patent: 6421808 (2002-07-01), McGeer et al.
patent: 2004/0019883 (2004-01-01), Banerjee et al.
patent: 1 107 116 (2001-06-01), None
Yu-Kwong Kwok and Ishfaq Ahmad; “Dynamic Critical-Path Scheduling: An Effective Technique for Allocating Task Graphs to Multiprocessors;” May 1996, pp. 506-521; vol. 7, No. 5, IEEE Transactions On Parallel and Distributed Systems.
Min-You Wu and Daniel D. Gajski; “Hypertool: A Programming Aid For Message-Passing Systems;” Jul. 1990, pp. 330-343, vol. 1, No. 3, IEEE Transactions On Parallel and Distributed Systems.
Jing-Jang Hwang, Yuan-Chieh Chow, Frank D. Anger, and Chung-Yee Lee; “Scheduling Precedence Graphs In Systems With Interprocessor Communication Times;” Apr. 1989, pp. 244-257, vol. 18, No. 2, Siam Journal Computing.
Gilbert C. Sih and Edward A. Lee; “A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures;” Feb. 1993, pp. 175-187; vol. 4, No. 2, IEEE Transactions On Parallel and Distributed Systems.
Tao Yang and Apostolos Gerasoulis; “DSC: Scheduling Parallel Tasks on an Unbounded Number of Processors;” pp. 1-36, IEEE Transactions On Parallel and Distributed Systems, 1994.
Charles J. Alpert and Andrew B. Kahng; “Recent Directions in Netlist Partitioning: A Survey;” pp. 1-93, UCLA Computer Science Department, 1995.
William J. Dally, J. A. Stuart Fiske, John S. Keen, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, Roy E. Davison and Gregory A. Fyler; “The Message-Driven Processor: A Multicomputer Processing Node with Efficient Mechanisms;” Apr. 1992; pp. 24-39, IEEE Micro.
F. W. Howell, R. Williams, and R. N. Ibbett;Hierarchical Architecture Design and Stimulation Environment; University of Edinburgh, 1994, pp. 363-366.
Quickturn Cobalt Webpage; “Quickturn Boosts Speed, Flexibility In CoBalt 2.0;” Apr. 20, 1998; pp. 1-4.
Vivek Sarkar; “Partitioning and Scheduling Parallel Programs for Multiprocessors;” Copyright 1989, pp. 1-201, The MIT Press.
C. Ajluni; “Advanced Emulation Tool Targets High-Speed Functional Verification”; vol. 45, No. 5, pp. 80, 82; Mar. 3, 1997; Electronic Design, Penton Publishing, USA.
European Search Report dated Apr. 21, 2004 (5 pgs.).
Ball Michael S.
Broughton Jeffrey M.
Chen Ihao
Chen Liang T.
Cohen Earl T.
chow Chih-Ching
Dam Tuan
Osha & Liang LLP
Sun Microsystems Inc.
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