Method and apparatus for simulating behavioral constructs...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing

Reexamination Certificate

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C716S106000, C716S107000

Reexamination Certificate

active

07934183

ABSTRACT:
One embodiment of the present invention provides a system that simulates behavioral constructs of a register transfer level design using indeterminate values. The system may receive hardware description language code which includes a construct that behaves differently depending on the value of an expression, e.g., the construct may execute different portions of code based on the value of a control expression, or it may store data in different storage locations based on the value of an index expression, etc. In response to determining that the expression's value is indeterminate, the system can execute two or more alternatives that are controlled by the expression, and then merge the results in some prescribed way. An embodiment of the present invention can enable a user to reduce the discrepancy between the results generated by a register transfer level simulation and the results generated by the associated gate level simulation.

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Bening, Lionel “A Two-State Methodology for RTL Logic Simulation”, DAC 99, New Orleans, Proceedings of the 36th ACM/IEEE Conference on Design Automation.
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Haufe, Christian et al., “Ad-Hoc Translations to Close Verilog Semantics Gap”, 2008 IEEE.

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