Patent
1994-10-24
1998-03-31
Downs, Robert W.
395402, 395405, 395404, 395415, 395412, 395416, 395417, 395418, G06F 926, G06F 1202, G06F 1204, G06F 1210
Patent
active
057348588
ABSTRACT:
A method and apparatus for providing access to a banked peripheral memory via a contiguous linear address space. The present invention provides a linear address space having a present region that is mapped to a host memory region of a computer system. The present invention further provides a relocatable selector that provides access to a portion of the linear address space. Accessing programs exchange data with the banked peripheral memory via the relocatable linear address space. When an accessing program references an address of the relocatable address base that is not mapped to the present region, the relocatable linear address space is positioned so that the referenced address maps to the present region. Additionally, a bank of the peripheral memory that corresponds to the referenced address is also mapped into the host memory region so as to enable the accessing program to exchange data with the banked peripheral memory via the relocatable linear address space.
REFERENCES:
patent: 4926322 (1990-05-01), Stimac et al.
patent: 5249280 (1993-09-01), Nash et al.
patent: 5255382 (1993-10-01), Pawloski
patent: 5321425 (1994-06-01), Chia et al.
Statement Describing a Conventional System.
Chatterjee Amit
Gibson Michael S.
Patrick Stuart R.
Pletcher Richard A.
Downs Robert W.
Microsoft Corporation
Nguyen Than V.
LandOfFree
Method and apparatus for simulating banked memory as a linear ad does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for simulating banked memory as a linear ad, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for simulating banked memory as a linear ad will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-61529