Method and apparatus for simulating a logic circuit having a plu

Details Method and apparatus for simulating a logic circuit having a plu Method and apparatus for simulating a logic circuit having a plu

1991-09-12

1995-04-25

Coleman, Eric

Boots, shoes, and leggings

3642643, 3642642, 3642545, 364DIG1, G06F 1520

Patent

active

054106737

ABSTRACT:
A computer program-implemented logic circuit simulation receives data describing the configuration of a logic circuit to be simulated, and a library of component characteristics incorporated in the circuit. Signals are classified as a first type always to be "watched" or as a second type to be evaluated only upon transition of a watched signal to an activated logic state. The circuit is partitioned into evaluation blocks, each one containing components and input lines thereto carrying only signals to be evaluated. The content of the block is simulated by "lump simulation", i.e., Boolean calculation, in response to a change to the activated logic state in the watched signal for the block. The maximum delay associated with the block is compared to the difference between the present time and the time of change of the watched signal to the activated state. If the maximum delay is greater, because a change of input will not have fully propagated to the output of the block, conventional simulation by time-wheel control rather than lump simulation, is carried out. The conventional simulation, although slower, enables logic states of all components of the block to be determined.

REFERENCES:
patent: 4583169 (1986-04-01), Cooledge
patent: 4763288 (1988-08-01), Deering
patent: 4815016 (1989-03-01), Young
patent: 4924430 (1990-05-01), Zasio
patent: 4937770 (1990-06-01), Samuels
patent: 5095454 (1992-03-01), Huang
patent: 5210700 (1993-05-01), Tom

Affiliated with

Also associated with

Rating

Method and apparatus for simulating a logic circuit having a plu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for simulating a logic circuit having a plu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for simulating a logic circuit having a plu will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1574283