Method and apparatus for separating data and clock from a digita

Details Method and apparatus for separating data and clock from a digita Method and apparatus for separating data and clock from a digita

1994-05-23

1997-01-28

Chin, Stephen

Pulse or digital communications

Synchronizers

Self-synchronizing signal

375371, H04L 702, H04L 700

Patent

active

055984436

ABSTRACT:
A digital data separator is provided for separating clock information and data from a data stream which is subject to varying amounts of undesired jitter which tend to corrupt the data. A read data window of controlled duration is generated for sampling the input data. The current best estimate of the duration of the read data window is stored in a period register as a period register value. The period register value minus one is loaded into a time register as the time register value. A count down cycle is performed by subtracting a value of one from the time register value in each clock cycle during the course of the count down cycle. The read data window is toggled to begin a new read data window when the time register value is near zero, the value remaining in the time register being designated the remaining value.

REFERENCES:
patent: 4472818 (1984-09-01), Zapisek et al.
patent: 4633488 (1986-12-01), Shaw
patent: 4796280 (1989-01-01), Nesin et al.
patent: 5260842 (1993-11-01), Leake et al.

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