Method and apparatus for sensing thermal stress in integrated ci

Details Method and apparatus for sensing thermal stress in integrated ci Method and apparatus for sensing thermal stress in integrated ci

1989-11-22

1990-11-13

Orsino, Joseph A.

Communications: electrical

Condition responsive indicating system

Specific condition

307310, G08B 1706

Patent

active

049704974

ABSTRACT:
An integrated semiconductor chip includes, integral to its substrate, a thermal sensing circuit formed from an array of transistors connected together in a stacked array so as to multiply the inherent effects of temperature on output voltage. A series of gates is connected to the output of the transistor array. A reference voltage is applied to the transistor array, and the inherent temperature-variable output of the array is then applied to the gates. The gates change states at known temperatures and voltages, so that the digital state output of each gate indicates whether the substrate temperature is greater than or less than the switching temperature associated with that gate. By sensing gate output, the chip itself or an external device can determine the temperature of the substrate within a certain range. When the temperature is outside the safe operating range for the chip, the chip or an external device takes steps to prevent unsafe operation. The invention exploits the inherent temperature dependency of the current output of MOS transistors to form a temperature sensing circuit that is highly accurate and inexpensive.

REFERENCES:
patent: 4102194 (1978-07-01), Eng
patent: 4137467 (1979-01-01), Plog
patent: 4556807 (1985-12-01), Yamada et al.
patent: 4695823 (1987-09-01), Vernon
patent: 4779161 (1988-10-01), DeShazo, Jr.
patent: 4884443 (1989-12-01), Lee et al.

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