Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2000-12-12
2002-01-01
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189110, C365S189070
Reexamination Certificate
active
06335900
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to memory circuits, and more particularly, to static and dynamic memories operable over wide power supply ranges.
2. Description of the Related Art
Static random access memory circuits (SRAMs) and dynamic random access memory circuits (DRAMs) require high densities and minimal read/write circuit architectures. To support minimal architectures, word line access circuits are shared in a wired-OR fashion. A storage cell is accessed by pre-charging a row word line wire and enabling a selected column gating transistor to read the value from the cell.
Use of memory circuits in battery-operated and other low voltage devices make it desirable to operate the memory circuits at as low a voltage as possible. Reading reliable results from a dynamic memory operating at a low power supply voltage is complicated by the large capacitance of the word lines and the threshold drop produced by the gating transistor. Low power supply voltages reduce the speed of the memory and at very low voltages, the reliability of the values read out. To solve this problem, memory circuits having a bootstrapped boost voltage applied to the word lines have been developed. The row word line is charged to a voltage higher than the power supply rail prior to accessing the memory location by switching on the column gating transistor.
While boost circuits provide reliable memory operation at low voltages, at high voltages, the access circuitry is over-stressed, limiting the upper end of the power supply operating range of memory device. Boosting also increases the power consumption of a memory. At high supply voltages, the power dissipation can exceed tolerable levels.
In light of the foregoing, it would be desirable to provide a method and apparatus for operating a memory device over a wide power supply range.
SUMMARY OF THE INVENTION
The objective of operating a memory device over a wide power supply range is accomplished in a method and apparatus for selectable word line boosting in a memory device. The memory device incorporates a word line access circuit having a selectable boost. A voltage comparator is coupled to the word line access circuit to enable boosting if a power supply voltage is less than a threshold voltage.
The above as well as additional objectives, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
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patent: 5841706 (1998-11-01), Umezaki et al.
patent: 6141262 (2000-10-01), Sudo
patent: 6229753 (2001-05-01), Kono et al.
Kwon Oh-sang
Ngo Hung Cai
Nowka Kevin John
Bracewell & Patterson L.L.P.
Hoang Huan
Salys Casimer K.
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