Method and apparatus for segmenting memory to reduce the memory

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

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348415, 348716, H04N 736

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active

06088391&

ABSTRACT:
A memory system for B frames of pixel data, where each B frame includes a plurality of sections, and where each of the plurality of sections includes pixel data corresponding to the top and bottom fields of a frame. The memory system includes a memory organized into a plurality of segments for storing the pixel data, where the number of segments equals the number of frame sections plus two additional segments. However, each of the segments is half the size of a frame section. The memory system also includes a segmentation device for receiving and separating pixel data according to the top and bottom fields of each frame. The segmentation device tracks the segments to determine two available segments of said memory, and for each section of each frame, stores pixel data from the top field into one of the available segments and stores pixel data from the bottom field into the other available segment of the memory. A segment pointer table is preferably included for tracking the segments of memory for interlaced display. A decoder system includes the memory and the segmentation device, and also includes a reconstruction unit for receiving and decoding video data into pixel data, and display circuitry for retrieving pixel data from the segments. A method of storing and retrieving pixel data includes steps of separating and storing the pixel data by field into respective segments. After half a framestore, the retrieved by a display device for interlaced display.

REFERENCES:
patent: 5717461 (1998-02-01), Hoogenboom
patent: 5825636 (1998-11-01), Auld
International Search Report for PCT/US 97/09217 dated Oct. 16, 1997.

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