Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1997-08-08
2001-12-11
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S760020
Reexamination Certificate
active
06329831
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to methods and apparatuses for testing integrated circuit devices under various environmental and stress conditions, and, in particular, methods and apparatuses for reliability testing of interconnections and transistor structures in integrated circuits at ultra-high frequencies and under dynamically varying stress conditions.
BACKGROUND OF THE INVENTION
Integrated circuit reliability test systems have been devised to test the reliability of structures for interconnections or transistors in integrated circuit devices. The structures are placed under various dynamically varied environmental and stress conditions. For example, in order to design and implement a CPU to run at ultra-high frequencies (faster clock speeds), the interconnection structures and transistor structures for the CPU must be able to perform at these ultra-high frequencies and under the various dynamic stress conditions. Thus, before these structures are used in integrated circuit designs, they are specifically laid out in integrated circuit devices made specifically for testing purposes, where they are commonly referred to as devices-under-test (DUTs). The devices are then placed on a board where a number of signals can be fed to these DUTs. The board is then placed in a test chamber where the chamber can be programmed to create various environmental stress conditions such as variation in temperature and variation in electromagnetic field strength. While the board is in the chamber under programmed stress conditions, different types of signals at various frequencies can be provided to the DUTs to test the structures. Various characteristics of the structures within the DUTs can be monitored to appreciate the performance of the structures.
Referring to
FIG. 1
a
, prior art systems provide a board
2
with a number of sockets for the placement of the DUTs (DUT
1
-DUT
14
). In routing the input signals to the DUTS, there is a connector
4
on the board to receive the input signals and to route the signals to each DUT via the data bus
6
. The output signals generated by the DUTs are also passed back to the system via the data bus
6
and connector
4
. One of the problems with this prior art system is that the input signal degrades when it travels down the data bus such that the input signal wave form at DUT
1
is not the same as the input signal wave form at DUT
7
. This problem becomes particularly acute when the input signal is at a very high frequency such that a square wave form may become progressively less square the further away from the connector.
FIG. 1
b
illustrates the wave form at DUT
1
(
FIG. 1
a
,
9
) where the signal fairly resembles a square wave form input signal.
FIG. 1
c
illustrates the wave form at DUT
7
(
FIG. 1
a
,
10
) where the input signal has deteriorated such that it does not resemble the square wave form at all. A result of this phenomenon is that the input signals to the DUTs are not uniform and the results generated are therefore non-uniform and unreliable.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method and apparatus for uniformly and reliably testing of DUTs.
It is another object of the present invention to provide a method and apparatus for uniformly and reliably monitoring of DUTs.
It is yet another object of the present invention to provide a method and apparatus for uniformly and reliably delivering of input signals to the DUTs.
Briefly, a presently preferred embodiment provides a method and apparatus for monitoring and controlling devices under test. The preferred embodiment includes a computer based controller, a temperature control module, a power supply controller, a chamber interface module, a driver card and a DUT board. The computer-based controller responding to preprogrammed instructions (software) operates and coordinates the temperature control module, the chamber interface module, the power supply controller, and the driver card. The driver card, receiving commands and data from the computer-based controller, sends and receives a number of signals to and from the DUTs on the DUT board. These signals include voltage sources for operating the DUTs, a load voltage, DC current sources for setting duty and frequency cycles, switch signals, voltage measurement signals, and resistance measurement signals. The DUT board is a printed circuit board for holding a number of DUTs. Each of the DUTs is an integrated circuit containing one or more sets of circuitry for testing specifically designed test structures.
The circuitry of the DUT generally includes an oscillator with controllable duty cycle and frequency to excite the test structure. Measurement traces are provided on two sides of the test structure for measuring the characteristics of the test structure. The measured signals are then sent back to the driver card and to the computer-based controller for processing. In this manner, each DUT receives control signals in the form of DC current levels which control the duty cycle and the frequency of the wave form in testing the test structure. Since electrical DC current levels are fairly simple to control and can be uniformly delivered to each of the DUTs, the DUTs can be uniformly operated and tested. Therefore, the results generated by DUTs provide a higher level of consistency, uniformity, and reliability.
An advantage of the present invention is that it provides a method and apparatus for uniformly and reliably testing of DUTs.
Another advantage of the present invention is that it provides a method and apparatus for uniformly and reliably monitoring of DUTs.
Yet another advantage of the present invention is that it provides a method and apparatus for uniformly and reliably delivering of input signals to the DUTs.
These and other features and advantages of the present invention will become well understood upon examining the figures and reading the following detailed description of the invention.
REFERENCES:
patent: 5030905 (1991-07-01), Figal
patent: 5124638 (1992-06-01), Winroth
patent: 5187432 (1993-02-01), Bauernfeind et al.
patent: 5241266 (1993-08-01), Ahmad et al.
patent: 5390129 (1995-02-01), Rhodes
patent: 5414370 (1995-05-01), Hashinaga et al.
patent: 5557559 (1996-09-01), Rhodes
patent: 5610529 (1997-03-01), Schwondt
patent: 5701667 (1997-12-01), Birch et al.
patent: 5760595 (1998-06-01), Edwards et al.
patent: 5798653 (1998-08-01), Leung, Jr.
patent: 5966021 (1999-10-01), Eliashberg et al.
Matthew N. O. Sadiku, “Elements of Electromagnetics,” Second edition, Oxford University Press (1995), p. 3.*
O'Shea et al, “Introduction to Lasers and Their Applications,” Adddison-Wesley Series in Physics (1978), pp. 5-8.*
Raymond A. Serway, “Physics for Scientists & Engineers,” Third edition, Saunders Golden Sunburst Series (1992), pp. 973-976.
Bui Nguyen Duc
Niederhofer Michael Anthony
Pham Van Hung
Advanced Micro Devices , Inc.
Hollington Jermele
Metjahic Safet
LandOfFree
Method and apparatus for reliability testing of integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for reliability testing of integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for reliability testing of integrated... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2588133