Method and apparatus for regulating the efficiency of a...

Details Method and apparatus for regulating the efficiency of a... Method and apparatus for regulating the efficiency of a...

2005-06-14

2005-06-14

DeBeradinis, Robert L. (Department: 2836)

Electrical transmission or interconnection systems

Plural load circuit systems

Control of current or power

C307S080000, C307S083000, C307S140000

Reexamination Certificate

active

06906433

ABSTRACT:
A computer system having multiple components capable of being in either a wake or sleep state includes a power manager and a voltage regulator. The power manager may generate a power state status signal indicating the power states of the components, and this signal may be provided to the voltage regulator. In response, the voltage regulator may operate in a synchronous mode when the power state status signal indicates that the components are in a wake state. The voltage regulator may operate in a non-synchronous mode when the power state status signal indicates that the components are in a sleep state.

REFERENCES:
patent: 5481178 (1996-01-01), Wilcox et al.
patent: 2003/0014675 (2003-01-01), Lee
patent: 2003/0065497 (2003-04-01), Rhoads

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