Method and apparatus for reducing power consumption within a...

Pulse or digital communications – Spread spectrum – Frequency hopping

Reexamination Certificate

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C375S142000, C375S150000, C375S343000

Reexamination Certificate

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11183683

ABSTRACT:
A method and apparatus for reducing power consumption within a wireless receiver is provided herein. Particularly, the use of partial chip sequence correlation to reduce the average power consumption of a direct sequence spread spectrum (DSSS) wireless transceiver is provided herein. During operation, the receiver will attempt to correlate, or de-spread, less than all chips that constitute a symbol. A partial correlation may be performed on M chips, where M may be much less than N, the number of chips that represent a whole symbol. In a preferred embodiment, the M chips are the first M chips in the symbol.

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patent: 2006/0018370 (2006-01-01), Mizuno

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