Method and apparatus for reducing oscillator pull in a CMOS...

Pulse or digital communications – Pulse width modulation

Reexamination Certificate

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C379S401000, C379S402000, C379S403000

Reexamination Certificate

active

06665339

ABSTRACT:

BACKGROUND
This invention is related to integrated circuit technology, and in particular to reducing the effects of sudden surges in current demand in complementary metal oxide semiconductor (CMOS) integrated circuits for radio applications in order to reduce oscillator pull.
Integrated circuits devices are omnipresent nowadays and used for both analog and digital functions, often on the same device. CMOS technology is well established and offers many advantages over other technologies.
The use of CMOS in high frequency radio circuits has been limited for many reasons. One reason is the difficulty in realizing accurate on-chip oscillators with CMOS technology. A particular problem is the effect on oscillators of sudden power demands.
Consider, for example, a radio transceiver chip that includes a first set of analog subcircuits forming a superheterodyne receiver and a second set of analog subcircuits forming a transmitter. The transmitter further includes a superheterodyne transmitter front-end and a power amplifier. The receiver and transmitter front-end each include two mixers (not shown) requiring two oscillator signals supplied by on-chip oscillators—e.g., phase-locked loop synthesizers. The radio transceiver chip also has a power supply, including a bias current supply for the analog subcircuits. Note that providing a bias current to a circuit is also called biasing herein.
Suppose that the transceiver chip operates either in transmit mode or in receive mode in mutually exclusive transmit and receive periods. The transceiver, for example, may be a half-duplex transceiver. Alternatively, the transceiver may be a full-duplex transceiver for operation in a time-domain multiple access (TDMA) system in which transmitting and receiving occur in mutually exclusive timeslots.
Mainly in order to limit the power consumption, the power amplifier, possibly together with the transmitter front-end, is turned on for transmit periods, and off for receive periods. The transition from turned-off to turned-on causes a large rise in current demand from the power supply, which in turn causes a voltage drop across the oscillators
111
and
113
. This voltage drop may cause the frequency of the oscillators to change. The amount of frequency change depends on the design of the oscillator.
Note that another reason for the power amplifier being turned off during receive to eliminate the radiation of spurious signals onto the medium which might otherwise cause regulatory compliance problems.
Furthermore, because of the large rate of change in bias currents, a relatively large (Ldi/dt) voltage drop occurs across intrinsic ground inductances. An Ldi/dt drop also occurs across intrinsic package power supply inductances. The voltage drops effectively inject noise into the substrate that perturbs the voltage across the oscillators. This also may cause changes in the oscillators' frequency. The perturbation of the oscillator frequency because of sudden changes in current is referred to as oscillator pull herein. Frequency perturbations require time to settle, and this may effect the turnaround time from transmit to receive and vice-versa. For example, in the IEEE 802.11a standard for wireless local area networks (WLANs) in the 5 GHz region, the turnaround time is specified to be within approximately 1-2 &mgr;s. Furthermore, high turnaround times in general reduce system data throughput. It is thus desirable to minimize turnaround times. This is particularly important in high data rate systems For more information on the IEEE 802.11a standard, see: (1) Draft Supplement to Standard For Telecommunications and Information Exchange Between Systems—LAN/MAN Specific Requirements—Part 11: Wireless Medium Access Control (MAC) and physical layer (PHY) specifications: High Speed Physical Layer in the 5 GHz band. {P802.11a/D7.0 July 1999}; (2) Draft Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications. {ANSI/IEEE Std 802.11, 1999}; and (3) http://www.manta.ieee.org/groups/802/11/.
Similarly, turning off the bias current to the power amplifier may cause fluctuations in the local oscillator frequencies that may limit the turnaround time from transmit to receive mode. In addition, to further save power, it may be that the bias current to the receiver is also turned off during transmit periods. In such a case, the turning on or off of the bias current to the receiver may cause fluctuations in the local oscillator frequencies that may limit the turnaround time from transmit to receive mode or vice-versa.
In prior art systems, the effect of oscillator pull was reduced by locating oscillators and power amplifier or other high current subcircuits on different substrates, and/or by shielding the oscillators using, for example, metal casings. It is desirable to reduce oscillator pull and thus reduce the turnaround time while including the oscillators on the same substrate as other subcircuits. Furthermore, it is desirable to avoid relatively expensive shielding.
SUMMARY
One embodiment described herein is a monolithic integrated circuit that includes a substrate, a first set of one or more subcircuits on the substrate, and a second set of one or more subcircuits on the substrate. Also included is a bias current supply coupled to the first and second sets to provide bias current to the first and second sets. The bias supply includes a first bias circuit on the substrate coupled to, and to supply bias current to, a first subcircuit of the first set. The first bias circuit includes a first current modulator having a first switch input to indicate that the bias current is to start being or stop being supplied to the first subcircuit. The first current modulator is to control the rate of change of supplied bias current in response to the first switch input.
In one embodiment, the first and second sets comprise MOS transistors. In one version, the MOS transistors are in a CMOS configuration.
In one embodiment, the integrated circuit operates as a radio transceiver including a receiver and a transmitter. The transmitter includes the first set of subcircuits and the receiver includes the second set of subcircuits, The first subcircuit includes a power amplifier in the transmitter. The radio transceiver may operate in a mode having mutually exclusive transmit and receive time periods, with the first switch input to turn the power amplifier on or off for respectively operating or not operating in a transmit period.
In one embodiment, the bias current supply further includes a second bias circuit on the substrate coupled to, and to supply bias current to, a second subcircuit of the second set, and a third bias circuit on the substrate coupled to, and to supply bias current to, a third subcircuit of the first set. The third bias circuit includes a third current modulator having the first switch input to control the rate of change of supplied bias current in response to the first switch input, with the first switch input additionally indicating that the bias current is to start or stop being supplied to the third subcircuit.
In one embodiment, the second bias circuit includes a second current modulator having a second switch input to control the rate of change of supplied bias current in response to the second switch input, the second switch input to indicate that the bias current is to start or stop being supplied to the second subcircuit.


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