Patent
1991-01-22
1997-05-13
Black, Thomas G.
39518319, G06F 1114
Patent
active
056301138
ABSTRACT:
A data stream is received by a first in a series of repeating devices and retransmitted from repeating device to repeating device. As the data stream is retransmitted, the data stream accumulates jitter. A jitter reduction apparatus therefore is used after a series of repeating devices to substantially reduce the accumulated jitter. The jitter reduction apparatus receives the data stream, stores the recognized data, then retransmits the data using a recovered clock signal. According to one embodiment, the recovered clock signal is the clock signal of the original data transmission. According to another embodiment, the recovered clock signal is derived from the data stream as input to the first of the series of repeating devices. Such derived clock signal serves as an estimate of the original data source clock signal. By using a recovered clock signal (e.g., original or derived) rather than the input data stream of the jitter reduction apparatus, the jitter reduction apparatus substantially reduces or eliminates accumulated jitter. According to various configurations of groups of repeating devices and jitter reduction apparatuses, a linear or hierarchy approach to jitter reduction may be implemented.
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PCM Jitter Attenuator Part No. CS61600, Crystal Semiconductor Corporation (Sep. 1987).
Archambault Steven E.
Hayssen, III Carl G.
Sassower Stanley P.
Black Thomas G.
Loomis John C.
Ungermann-Bass, Inc.
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