Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
2002-08-26
2003-12-23
Eckert, George (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S632000, C257S650000
Reexamination Certificate
active
06667540
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to methods and apparatus for manufacturing semiconductor devices, and in particular to reducing the fixed charge in insulative layers on such devices.
BACKGROUND OF THE INVENTION
Field effect transistors (FETs) are formed on silicon, or similar semiconductor substrates. A field effect transistor is usually formed with active areas such as two heavily doped, spaced apart regions of silicon, which are called a source and a drain. A gate structure is formed between the source and the drain, and operates to control the amount of electrical current which flows between them. When appropriate voltage is applied to the gate, an electrically conductive channel is formed under the gate, allowing current flow between the source and the drain. Active areas of adjacent transistors may be isolated from each other by the formation of a field oxide layer which acts as an insulator.
Part of the process of forming transistors involves the application of various layers of material. One such layer is utilized as an insulating layer between the gate and metal interconnects. Silane based layers have been used in the past, but do not fill tight spaces very well. Tetraethyloxysilicate (TEOS) based borophosphosilicate glass (BPSG) film layers using TEOS is a silicon containing source gas which has also been used. Doping TEOS with boron and phosphorus through the addition of triethylborane (TEB) and triethylphosphate (TEPO) respectively, increases the film's ability to reflow and fill in tight spaces. Such BPSG layers, however, have been plagued with unacceptable fixed electrical charge, thus being unsuitable for use in semiconductor devices. This is characteristic of both plasma and non-plasma TEOS based BPSG deposition. However, due to the material's superior abilities to reflow at low temperatures and getter mobile species, it is highly desirable to adapt this material for use in semiconductor devices, particularly those employing certain silicide technologies which require lower temperatures to avoid agglomeration, such as those using titanium silicide.
Such layers are used as insulators between conductive layers. Excess fixed charge has an undesirable effect on adjacent layers. Excessive fixed charge for example can cause the silicon surface to invert under the field oxide, resulting in an undesirable channel for current to flow between two active areas that are isolated by the field oxide. This channel has a charge opposite to that of the substrate, which is also depleted of charge carriers in the region surrounding the inversion region. Thus, the excessive fixed charge creates or quickens the formation of the channel through which current flows, at undesired times. Excessive fixed charge also causes threshold voltage degradation in field transistors, causing premature and excessive leakage, in both n-type and p-type channel devices. The threshold voltage is the minimum voltage that must be applied for a current to flow in the channel between active regions. In semiconductor field transistor devices, it is paramount that the threshold voltage be maintained above a certain level to reduce leakage current between active regions.
There is a need to bring this fixed charge down to levels that do not induce a channel to form between active regions of field transistors formed in semiconductor substrates. There is also a need to provide an insulative layer having good reflow capabilities at low temperatures and which exhibit a low fixed charge.
SUMMARY OF THE INVENTION
An insulative film layer such as borophosphosilicate glass (BPSG) is deposited on a semiconductor device by reacting Tetraethyloxysilicate (TEOS) with ozone (O
3
). O
3
is formed in a corona discharge tube by flowing O
2
such that the O
3
concentration in O
2
is between approximately 2-20% by weight. Triethylphosphate (TEPO) and triethylborane (TEB) are organometallics used to dope the film with phosphorous and boron respectively. The BPSG is deposited at pressures of approximately 10 Torr to 760 Torr or atmospheric pressure. The temperature of the BPSG layer is higher than approximately 480 degrees C. This provides a low fixed charge film of BPSG which reflows well at low temperatures. The low fixed charge raises the threshold voltage which in turn helps prevent inducement of undesired channels between unassociated active areas in devices formed in the substrate.
REFERENCES:
patent: 4872947 (1989-10-01), Wang et al.
patent: 4892753 (1990-01-01), Wang et al.
patent: 4960488 (1990-10-01), Law et al.
patent: 5000113 (1991-03-01), Wang et al.
patent: 5104482 (1992-04-01), Monkowski et al.
patent: 5231058 (1993-07-01), Maeda et al.
patent: 5344797 (1994-09-01), Pai et al.
patent: 5354715 (1994-10-01), Wang et al.
patent: 5362526 (1994-11-01), Wang et al.
patent: 5382550 (1995-01-01), Iyer
patent: 5409858 (1995-04-01), Thakur et al.
patent: 5445699 (1995-08-01), Kamikawa et al.
patent: 5474955 (1995-12-01), Thakur
patent: 5486267 (1996-01-01), Knight et al.
patent: 5506443 (1996-04-01), Furumura et al.
patent: 5523597 (1996-06-01), Baumann et al.
patent: 5552342 (1996-09-01), Itou et al.
patent: 5576247 (1996-11-01), Yano et al.
patent: 5631174 (1997-05-01), Iyer
patent: 5716891 (1998-02-01), Kodama
patent: 5789313 (1998-08-01), Lee
patent: 5906861 (1999-05-01), Mack et al.
patent: 6462394 (2002-10-01), Thakur et al.
patent: 0272140 (1988-06-01), None
patent: 0497541 (1992-08-01), None
patent: 07-273182 (1995-10-01), None
patent: 4-7-326750 (1995-12-01), None
Fry, H..W. ,et al. ,“Applications of APCVD TEOS/O3 thin films in ULSI IC fabrication”,Solid State Technology, 37, No. 3,(Mar. 1994),pp. 31-40.
Fujino, K..,et al. ,“Doped Silicon Oxide Deposition by Atmospheric Pressure and Low Temperature Chemical Vapor Deposition Using Tetraethoxysilane and Ozone”,Journal of the Electrochemical Society, 138, No. 10,(Oct. 1991),pp. 3019-3024.
Fujino, K..,et al. ,“Reaction Mechanism of TEOS and O3 Atmospheric Pressure CVD”,1991 VMIC Conference, (Jun. 11-12, 1991),445-447.
Kim, S..B. ,et al. ,“Mechanism for the N-field Device Failure in Double Level Metal CMOS Device”,IEEE IRPS, (1994),309-315.
Kuo, H..H. ,et al. ,“Intermetal Dielectric-Induced N-Field Device Failure in Double-Level-Metal CMOS Process”,IEEE Electron Device Letters, 13, (Aug., 1992),405-407.
Lee, P..,et al. ,“Sub-atmospheric Chemical Vapor Deposition (SACVD) of TEOS-Ozone USG and BPSG”,1990 VMIC Conference, (Jun. 12-13, 1990),396-398.
Liu, L..M. ,et al. ,“Back-end Induced IMO Layer Charging”,1991 VMIC Conference, (Jun. 11-12, 1991),451-453.
Maeda, Kazuo.,et al. ,“CVD TEOS/O3: Development history and applications”,Solid State Technology, 36, No. 6,(Jun. 1993),pp. 83-88.
Nishimoto, Y..,et al. ,“Dielectric Film Desposition by Atmospheric Pressure and Low Temperature CVD Using TEOS, Ozone and New Organometallic Doping Sources”,1989 VMIC Conference, (Jun. 12-13, 1989),382-389.
Pramanik, D..,et al. ,“Field Inversion in CMOS Double Metal Circuits Due to Carbon Based SOGS”,1989 VMIC Conference, (Jun. 12-13, 1989),454-462.
Ruska, W..S. ,In: Microelectronic Processing—An Introduction to the Manufacturing of Integrated Circuits, McGraw-Hill Book Company, New York,(1987),p. 92.
Iyer Ravi
Rhodes Howard E.
Thakur Randhir P. S.
LandOfFree
Method and apparatus for reducing fixed charge in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for reducing fixed charge in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for reducing fixed charge in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3177954