Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1998-08-20
2001-04-17
Gaffin, Jeffrey (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S777000, C361S780000, C361S818000, C333S012000, C333S246000, C174S255000, C174S261000, C029S846000
Reexamination Certificate
active
06219255
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to computer systems, and more particularly, to a method and apparatus for reducing electromagnetic interference in a printed circuit board, or the like, of a computer system.
2. Discussion of the Related Art
Discontinuities in signal paths of high speed return currents on a printed circuit board are a potential source for generation of electromagnetic interference (EMI) radiation and noise coupling. In addition, EMI radiation and noise coupling can cause undesirable adverse operation of circuit on the printed circuit board. A method and apparatus for reducing the undesired EMI interference and noise coupling is thus desired.
With respect to multilayer printed circuit boards, for example, as shown in
FIG. 1
, segmenting of a conductive layer (
10
,
12
) on an insulative layer
14
of the multilayered printed circuit board
16
may be done. Segmenting involves the dividing up of a planar conductive layer into physically separated segments, for example, segments
10
and
12
. In other words, each segment is physically separated from one another by a void or an insulative material
18
. The segments could be electrically connected via a capacitor or the like. A typical conductive plane which is segmented includes, for example, copper (Cu).
The segmenting of the conductive layer on a plane can be implemented for various reasons. One reason may include providing a power or reference plane having two different voltages. For example, a first segment
10
may be used to carry a 3.3 v reference voltage. A second segment
12
may be used to carry a 5.0 v reference voltage. In such a situation where the two segments are at different voltages, the segments must be physically separated. In other words, a physical void or insulative material
18
exists between segments. Multilayered printed circuit board often refers to printed circuit boards having two or more conductive circuits, wiring or segmented layers separated by one or more insulative layers
20
,
22
. Segmented layers could be included on any one of the conductive layers, as needed for a particular printed circuit board implementation.
While segmenting has been discussed with respect to a voltage plane, a ground plane could be segmented also. In such an instance, one ground plane segment could represent a ground plane for digital circuitry, the digital circuitry being characterized as noisy. Another ground plane segment could represent a quiet ground plane. The two ground plane segments are physically separated to maintain their respective characteristics, i.e., so that noise from the noisy ground plane segment does not bleed into the quiet ground plane segment. As discussed herein, plane segmentation can be done for a power plane, a ground plane, or any other reference plane.
In addition, to the above, multilayer printed circuit boards include several layers of laminated material, for example, layers
24
,
26
including conductive and insulative materials. Any one layer may include one or more reference segments, signal lines, and/or circuit portions. Furthermore, a single layer can include more than one segment. As discussed, the segments of any particular layer may include voltage or power plane segments, ground plane segments, or any combination of reference plane segments. A signal layer can also include a reference segment on the signal layer.
A problem arises when there are two different segments on a given plane of a multilayer printed circuit board
16
and an interconnect
28
in a second plane traverses over a boundary of a first segment
10
and a second segment
12
. The interconnect
28
can be situated in a layer above or below the first and second segments. Furthermore, the interconnect
28
is separated from the first and second segments by an insulative layer material
20
. If we assume that a driver
30
is situated on the side of the first segment
10
and connected via the interconnect
28
to a receiver
32
situated on the side of the second segment
12
, then a signal current, I
s
, is driven through the interconnect
28
. As the signal current travels down the interconnect
28
, there are two things that happen. First, the impedance of the interconnect
28
determines how smoothly the signal current I
s
will travel down the interconnect across the underlying segments. Note that the segments may alternatively be overlying segments. Secondly, considering for a moment small crosssections of the interconnect, from the driver
30
to the receiver
32
, the impedance of the individual cross-sections drastically changes in the region of the void
18
between the first segment
10
and the second segment
12
. In other words, a portion of the interconnect in the region of the void
18
between the first segment
10
and the second segment
12
encounters a drastic change of impedance.
Over the first segment
10
, the interconnect impedance is referenced with respect to the first segment. As a high speed or high frequency signal travels from the driver
30
to the receiver
32
, two things occur. That is, first, there is a change in impedance in the region of the void
18
between the first segment and the second segment. Such a change in impedance will have an adverse effect upon the high speed signal current, I
s
, and the corresponding voltage waveform that traverses the interconnect. The high speed signal may include, for example, a 6 MHz, 8 MHz, 33 MHz, 66 MHz, 100 MHz, or any other, repetitive, periodic, or pseudo-periodic signal having a high frequency. A pseudo-periodic signal is characterized by a signal that appears periodic for certain durations and non-periodic for other durations. Secondly, in response to the signal current, I
s
, there exists a return current, I
r
which travels along the segments of the reference plane. That is, when the signal current, I
s
, travels down the interconnect
28
, there is a return current, I
r
.
The return current I
r
is dissipated along the return path through the segments into various return currents and loop currents as shown in FIG.
2
. Considering a cross-section of the interconnect
28
above the second segment
12
, the return current (density) follows a normal distribution curve just under the cross-section of the interconnect. The majority of the return current for the high speed signal, will reside underneath the interconnect above the second segment. The return current will try to follow the route of the interconnect
28
, which is true for high speed signals but not true for DC signals. In other words, the return current, I
r
, tries to return to the driver
30
or source via the segments of the reference plane. As the return current, I
r
, reaches the void
18
between the second segment
12
and the first segment
10
, the return current, I
r
, encounters a “brick wall.” The “brick wall” represents the void
18
where there is no physical connection between the second segment
12
and the first segment
10
. The majority, or a high magnitude, of the return current will try to go across a face of the respective segment. In essence, however, the majority of return current creates a loop current i
L1
to each side of the interconnect
28
within the second segment
12
. A pitfall of such a created loop current is that any circuit elements or circuits in the proximity of the created loop current, above or below, can be adversely affected in an undesirable manner. The loop current i
L1
is created because the return current I
r
cannot couple from the second segment
12
to the first segment
10
and go back to the source
30
(i.e., the driver). Undesired coupling of the loop current with circuit elements or circuits in a proximity of the loop current in one or more adjacent layers can thus occur. With electromagnetic interference (EMI), if a cable attachment (not shown) is in proximity to the loop current i
L1
the cable extending perhaps out to or from a chassis, connector, keyboard, or other device, then the loop current i
L1
could undesirably couple ont
Dell USA L.P.
Gaffin Jeffrey
Haynes and Boone L.L.P.
Vigushin John B.
LandOfFree
Method and apparatus for reducing EMI in a computer system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for reducing EMI in a computer system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for reducing EMI in a computer system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2515163