Method and apparatus for reducing DC component of RLL codes

Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes

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341 58, H03M 700

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057422435

ABSTRACT:
Data converting method and apparatus for forming an RLL code which can perform a control to eliminate a DC component without an increase in number of bits. Natural numbers m, n, d, k, and k, satisfy conditions such that m<n and d<k<k.sub.1, an input data sequence by binary codes is divided into blocks each consisting of m bits and is sequentially converted to code words every one or a plurality of blocks at a ratio of (m bits:n bits) by a predetermined conversion rule in a manner that after completion of the conversion, the number of bits "0" between neighboring bits "1" is equal to d in minimum and k in maximum. When a value in a predetermined bit pattern in the code word sequence according to the predetermined conversion rule is equal to "1" and the value is changed to "0", a predetermined bit which causes a bit pattern that is not generated by the predetermined conversion rule is used as a control bit, and a value of the control bit is selectively set to "0" or "1", so that a new code word sequence in which the number of bits "10" between the adjacent bits "1" is equal to d in minimum and k.sub.1 in maximum and the control of DC component is enabled is formed.

REFERENCES:
patent: 4675650 (1987-06-01), Coppersmith et al.
patent: 4760378 (1988-07-01), Iketani et al.
patent: 4779072 (1988-10-01), Van Gestel
patent: 5451943 (1995-09-01), Satomura

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