Method and apparatus for reducing clock switching noise in conti

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

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327 94, 327552, 330107, H03K 500, H03B 100

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active

057317372

ABSTRACT:
A method and apparatus for reducing reference frequency signal and/or clock switching noise in self-tuned integrated continuous-time filters. In the master-slave automatic tuning scheme, one or more sample-and-hold circuits sample and hold the frequency control signal and Q-control signal generated by the feedback loop(s) of the automatic tuning system. The control signals are held at a constant level for a period of time during which the reference frequency signal and/or clock signal are quiescent. At one or more predetermined times, the frequency control and Q-control signals are intermittently updated to automatically tune the slave filter.

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Continuous-Time Integrated Filters--A Tutorial, R. Schaumann IEEE Proceedings, vol. 136, pp. 184-190, Aug. 1989.
Design Considerations for High Frequency Continuous-Time Filters and Implementation of an Antialiasing Filter for Digital Video, Gopinathan et al, IEEE J. Solid-State Circuits, Vol. SC-25, No. 6, pp. 1368-1378, Dec. 1990.
Design of a 15-MHZ CMOS Continuous-Time Filter with on-Chip Tuning, J.M. Khoury, IEEE J. Solid-State Circuits Vol. SC-26, no. 12, pp. 1988-1977 Dec. 1991.
The Problem of On-Chip Automatic Tuning in Continuous-Time Integrated Filters, Schaumann & Tan, IEEE Proc. ISCAS, pp. 106-109, 1989.

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