Pulse or digital communications – Synchronizers
Patent
1997-07-22
2000-03-28
Chin, Stephen
Pulse or digital communications
Synchronizers
370503, H04L 700
Patent
active
060441216
ABSTRACT:
An apparatus and method for receiving time skewed data from a parallel data bus. A data transfer on the parallel data bus is preceded by a start-of-cell delimiter consisting of a predetermined sequence of pulses on each of the data signals. The data is received from the bus by receive logic employing a local clock. Sampling logic is used to sample each of the data signals received from the bus at a rate which is higher than the local clock rate. Sample registers store a plurality of samples of corresponding data signals, the number of samples stored being large enough to store at least some of the pulses constituting the start-of-cell delimiter. Start-of-cell detect and center select logic is used for determining that a start-of-cell delimiter is stored in each of the sample registers, and for determining which of the samples stored in each of the sample registers represents the approximate center sample of one of the pulses of the start-of-cell delimiter. These center samples correspond to the data signals on the bus, but are de-skewed and synchronous with the local clock.
REFERENCES:
patent: 5359630 (1994-10-01), Wade et al.
patent: 5533072 (1996-07-01), Georgiou et al.
patent: 5625654 (1997-04-01), Pinier et al.
Nolan Scott W.
Poole Nigel T.
Salett Ronald
Cabletron Systems Inc.
Chin Stephen
McKiernan Thomas E
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