Method and apparatus for reading a programmable anti-fuse...

Details Method and apparatus for reading a programmable anti-fuse... Method and apparatus for reading a programmable anti-fuse...

2011-04-26

2011-04-26

Nguyen, Ha Tran T (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C365S225700

Reexamination Certificate

active

07932738

ABSTRACT:
In a method for reading a programmable anti-fuse block of a high-voltage integrated circuit a first voltage is applied to a first pin of the HVIC, the first voltage being lowered to a second voltage at a first node. Current is shunted from the first node, thereby lowering the second voltage to a third voltage. An isolation circuit block is then activated to couple the third voltage to a common node of the programmable anti-fuse block, the common node being coupled to a plurality of anti-fuses, each anti-fuse having a programmed state. A read signal is generated that causes a voltage potential representative of the programmed state of each anti-fuse to be latched into a corresponding latch element.

REFERENCES:
patent: 5977763 (1999-11-01), Loughmiller et al.
patent: 6449207 (2002-09-01), Sher et al.
patent: 7336095 (2008-02-01), Erickson et al.

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