Patent
1995-09-29
1999-01-12
Harvey, Jack B.
395284, G06F 1340
Patent
active
058599878
ABSTRACT:
An integrated circuit for providing multiple configuration modes in a multi-funtion intelligent bridge that includes an integrated processor. A first circuit, coupled to a first external bus, for selectively generating retry cycles onto the first external bus in response to a retry signal is provided. A second circuit, coupled to a local processor, for selectively resetting a local processor that is integrated in the intelligent bridge in response to a reset signal is provided. The first and second circuit, in conjunction with the retry signal and the reset signal, selectively provides one of a multiple number of configuration reset modes for the multi-function intelligent bridge.
REFERENCES:
patent: 5548730 (1996-08-01), Young et al.
patent: 5568619 (1996-10-01), Blackledge et al.
patent: 5608876 (1997-03-01), Cohen et al.
Davis Barry
Gillespie Byron
Harvey Jack B.
Intel Corporation
Pancholi Jigar
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