Method and apparatus for providing memory access in a processor

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

395394, 395562, 395563, G06F 9302, G06F 938

Patent

active

057870268

ABSTRACT:
The invention provides a method and apparatus for providing operand reads in a processor pipeline. According to one aspect of the invention, a method is described for executing an instruction in a computer pipeline that requires different operands be read from the same register file in different stages of the computer pipeline. According to another aspect of the invention, a method is described for executing an instruction in a processor pipeline. According to this method, at least a first operand is read from a register file in a first stage of the processor pipeline. If execution of the instruction causes the processor to place the first operand in a storage area other than the register file, then the first operand in written to that storage area in a subsequent stage of the processor pipeline. Otherwise, one or more ALU operations are performed on the first operand and at least a second operand in a different subsequent stage of the processor pipeline.

REFERENCES:
patent: 3711692 (1973-01-01), Batcher
patent: 3723715 (1973-03-01), Chen et al.
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4393468 (1983-07-01), New
patent: 4418383 (1983-11-01), Doyle et al.
patent: 4498177 (1985-02-01), Larson
patent: 4644466 (1987-02-01), Saito
patent: 4707800 (1987-11-01), Montrone et al.
patent: 4771379 (1988-09-01), Ando et al.
patent: 4933841 (1990-06-01), Mori et al.
patent: 4989168 (1991-01-01), Kuroda et al.
patent: 5095457 (1992-03-01), Jeong
patent: 5187679 (1993-02-01), Vassiliadis
patent: 5394515 (1995-02-01), Lentz et al.
patent: 5450607 (1995-09-01), Kowalczyk et al.
patent: 5454090 (1995-09-01), Fleck et al.
patent: 5454117 (1995-09-01), Puziol et al.
patent: 5488729 (1996-01-01), Vegesna et al.
patent: 5497499 (1996-03-01), Garg et al.
patent: 5509130 (1996-04-01), Trauben et al.
patent: 5517438 (1996-05-01), Dao-Trong et al.
patent: 5522052 (1996-05-01), Inoue et al.
patent: 5537606 (1996-07-01), Byrne
patent: 5555384 (1996-09-01), Roberts et al.
J. Shipnes, Graphics Processing with the 88110 RISC Microprocessor, IEEE (1992), pp. 169-174.
MC88110 Second Generation RISC Microprocessor User's Manual, Motorola Inc. (1991).
Errata to MC88110 Second Generation RISC Microprocessor User's Manual, Motorola Inc. (1992), pp. 1-11.
MC88110 Programmer's Reference Guide, Motorola Inc. (1992), pp. 1-4.
0860.TM. Microprocessor Family Programmer's Reference Manual, Intel Corporation (1992), Ch. 1, 3, 8, 12.
R.B. Lee, Accelerating Multimedia With Enhanced Microprocessors, IEEE (Apr. 1995), pp. 22-32.
TMS320C2x User's Guide, Texas Instruments (1993) pp. 3-2 through 3-11; 3-28 through 3-34; 4-1 through 4-22; 4-41; 4-103; 4-119 through 4-120; 4-122; 4-150 through 4-151.
L. Gwennap, New PA-RISC Processor Decodes MPEG Video, Microprocessor Report (Jan. 1994), pp. 16, 17.
SPARC Technology Business, UltraSPARC Multimedia Capabilities On-Chip Support for Real-time Vieo and Advanced Graphics, Sun Microsystems (Sep. 1994).
Y. Kawakami et al., LSI Applications: A Single-Chip Digital Signal Processor for Voiceband Applications, Solid State Circuits Conference, Digest of Technical Papers; IEEE International (1980).
Pentium Processor User's Manual, vol. 3: Architecture and Programming Manual, Intel Corporation (1993), Ch. 1,3,4,6,8, and 18.
M. Johnson, Superscalar Microprocessor Design, P.T.R. Prentice-Hall, Inc. (1991) Ch 1,2,3.
B. Case, Philips Hopes to Displace DSPs with VLIW, Microprocessor Report (Dec. 94), pp. 12-18.
G. Wyant and T. Hammerstrom, How Microprocessors Work, Ziff-Davis Press (1994) Ch 28-31.
N. Margulis, 1860 Microprocessor Architecture, McGraw Hill, Inc. (1990) Ch. 6, 7,8, 10,11.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for providing memory access in a processor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for providing memory access in a processor , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for providing memory access in a processor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-28235

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.