Method and apparatus for providing bus protocol simulation

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2642319, 264240, 264260, 264DIG1, G06F 1300

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057088390

ABSTRACT:
A method and apparatus for providing bus protocol simulation in a multi-processor data processing system (10). A plurality of edge interface circuits (14,16) are used to interface a first bus (32, 34, 36), which uses a first bus protocol, with a plurality of data processors (50-65), each of which uses a second bus protocol. A memory (90) within each edge interface circuit (14,16) is loaded with a plurality of values. Each of the plurality of values has a control portion and a data portion. The control portion of memory entry "N" is used to initiate the transfer of the data from memory entry "N+1". In an alternate embodiment, multi-processor data processing system (210) includes a plurality of data processors (250-258) and a plurality of edge interface circuits (214-217).

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