Method and apparatus for providing asynchronous memory...

Multiplex communications – Data flow congestion prevention or control

Reexamination Certificate

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Details

C370S237000, C370S395430

Reexamination Certificate

active

06438102

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the management of network nodes and, more particularly, to a mechanism for managing cell traffic in a multiservice switch platform.
BACKGROUND OF THE INVENTION
Until recently there has persisted a fundamental dichotomy between different types of telecommunication networks. A first type of telecommunication network, the telephone network, switches and transports predominantly voice, facsimile, and modulation-demodulation system (modem) traffic. A second type of telecommunication network, the data network, switches or routes and transports data between computers.
Telephone networks were developed and deployed earlier, followed by data networks. Telephone network infrastructures are ubiquitous, however, and as a result data networks typically are built, to a limited extent, using some components of telephone networks. For example, the end user access link to a data network in some cases is implemented with a dial-up telephone line. The dial-up telephone line thus connects the end user computer equipment to the data network access gateway. Also, high speed digital trunks interconnecting remote switches and routers of a data network are often leased from telephone carriers.
Nonetheless, telephone and data network infrastructures are usually deployed together with limited sharing of resources, especially with regards to the core components of the networks—the switches and routers that steer the payloads throughout the networks. The cost of this redundancy coupled with advances in data network technologies has led, where possible, to integrated data traffic comprising voice, data, facsimile, and modem information over a unified data network. As such, a data network should now be able to accept, service, and deliver any type of data on a random, dynamic basis using a minimum set of hardware on a single platform.
Multiservice network switches are used to provide a data path, or interface, between multiple networks, each of which may operate using a different type of data or according to a different networking standard protocol. Examples of the networking protocols supported by these multiservice switches include, but are not limited to, frame relay, voice, circuit emulation, T1 channelized, T3 channelized, and Asynchronous Transfer Mode (ATM).
Typical prior art switch platforms handling data of different types, speeds, and bandwidths exhibit a problem in that there is a significant risk of data loss because of the different data parameters. In order to reduce the risk of data loss, the typical prior art switches use first-in-first-out (FIFO) buffers. The problems with the typical prior art FIFOs are numerous but, overall, can be generalized as inflexible and performance limiting. First, the typical prior art FIFOs are limiting in that they are unidirectional and only support data flow in one direction. Next, the interface through the typical prior art FIFO is synchronous, thereby limiting the types of data accepted by the switch platform and the types of subscriber equipment coupled to the platform. Furthermore, the typical prior art FIFO has a fixed-width data path.
The typical prior art FIFO exhibits congestion problems in that it fails to provide adequate information regarding the quantity and contents of the FIFO. For example, the prior art FIFO does not provide quantitative information regarding the availability of cell space in the FIFO, and the cell space availability indications typically provided are based on word boundaries. Additionally, the prior art FIFO fails to provide a way to discard invalid data that has been written to a FIFO. Furthermore, the typical prior art FIFO limits diagnosis and switch platform performance monitoring as it fails to provide for a non-destructive processor read of the FIFO or a diagnostic loopback between multiple FIFOs.
In addition to the aforementioned problems with typical prior art FIFOs, these FIFOs fail to provide fair rate-based bandwidth allocation among cell traffic sources. Instead, the typical prior art FIFOs use a round-robin priority scheme to service the traffic sources, wherein all traffic sources are serviced in consecutive order with equal bandwidth being allocated to each traffic source. In a wide area network, for example, bandwidth allocation is important because customers are serviced and charged according to the bandwidth used. Therefore, a bandwidth allocation scheme that provides equal bandwidth to all traffic sources regardless of source requirements is inefficient and cost ineffective.
Furthermore, the typical prior art FIFO is problematic in that it fails to provide adequate cell traffic congestion management, a failure that results in dropped and lost cells. Furthermore, the prior art FIFO inefficiently manages the routing of information through a switch platform. This inefficiency results from globally assigning the cell bus logical connection number (LCN) and the UDF the same value for each connection. This global assignment tightly couples the LCN address space and the UDF address space, thereby forcing a large portion of the cell bus address space to be unusable. Furthermore, this global assignment requires switch platform software to make queries to multiple switch cards to find an unallocated value for use in both the LCN and the UDF address spaces.
SUMMARY AND OBJECTS OF THE INVENTION
It is therefore an object of the invention to provide fair rate-based cell traffic arbitration and bandwidth allocation between multiple cell traffic sources.
It is a further object of the invention to prevent dropped or lost cells in a switch platform by providing cell bus traffic congestion management.
It is a further object of the invention to provide flexibility and a performance improvement in the translation of cell traffic routing information.
These and other objects of the invention are provided by a parameterized bi-directional FIFO unit that controls cell traffic in a switch platform using a first and a second unidirectional FIFO buffer. The first and second unidirectional FIFO buffers each comprises asynchronous read and write ports. A cell size and a word size of the first and second unidirectional FIFO buffers are programmable. The bi-directional FIFO unit is coupled to write at least one cell from and read at least one cell to at least one asynchronous transfer mode (ATM) interface, at least one frame relay interface, at least one voice interface, and at least one data interface. As such, the first unidirectional FIFO buffer is coupled to write at least one cell from an ATM interface, a frame relay interface, a voice interface, and a data interface. The first unidirectional FIFO buffer is coupled to read at least one cell to at least one switch, wherein the switch handles cells from sources having a number of bandwidths. The switch is coupled to route the at least one cell to an OC12 trunk line and to at least one service module. The service module is coupled to provide the cell to at least one service subscriber using T1, E1, T3, E3, OC3, and OC 12 ports.
The second unidirectional FIFO buffer is coupled to read at least one cell to an ATM interface, a frame relay interface, a voice interface, and a data interface. Furthermore, the second unidirectional FIFO buffer is coupled to write at least one cell from at least one switch, wherein the switch handles cells from sources having a number of bandwidths. The switch may be coupled to route the cell from an OC12 trunk line and from a service module. The service module is coupled to provide the cell to at least one service subscriber using T1, E1, T3, E3, OC3, and OC 12 ports. Invalid cells are discarded from each unidirectional FIFO buffer.
Other objects, features, and advantages of the invention will be apparent from the accompanying drawings and from the detailed description which follows below.


REFERENCES:
patent: 4535427 (1985-08-01), Jiang
patent: 4740958 (1988-04-01), Duxbury et al.
patent: 4805199 (1989-02-01), Muramatsu
patent: 4864543 (1989-09-01), Ward et al.
patent: 5179552 (1993-01-01), Ch

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