Method and apparatus for providing address breakpoints, branch b

Details Method and apparatus for providing address breakpoints, branch b Method and apparatus for providing address breakpoints, branch b

1997-07-23

1998-04-14

Lall, Parshotam S.

3951831, G06F 1130

Patent

active

057404135

ABSTRACT:
A method and apparatus for providing address breakpoints, branch breakpoints, and single stepping is described. According to one aspect of the invention, a processor is provided which generally includes an execution unit, a first storage area, and an address breakpoint unit. The execution unit recognizes a first debug event in response to the execution of an instruction which causes a branch to be taken. The first storage area has stored therein information. The address breakpoint unit is coupled to the first storage area to receive the information. The address breakpoint unit is also coupled to the execution unit to receive addresses. The address breakpoint unit determines whether the addresses it receives form the execution unit are identified by the information. The execution unit recognizes a second debug event when the address breakpoint unit indicates one of these addresses is identified by the information.

REFERENCES:
patent: 4176394 (1979-11-01), Kaminski et al.
patent: 4179734 (1979-12-01), O'Leary
patent: 4279016 (1981-07-01), Leininger et al.
patent: 4306287 (1981-12-01), Huang
patent: 4403284 (1983-09-01), Sacarisen et al.
patent: 4409654 (1983-10-01), Wada et al.
patent: 4488227 (1984-12-01), Miu et al.
patent: 4598364 (1986-07-01), Gum et al.
patent: 4709324 (1987-11-01), Kloker
patent: 4725947 (1988-02-01), Shonai et al.
patent: 4755997 (1988-07-01), Takahashi
patent: 4783731 (1988-11-01), Miyazaki et al.
patent: 4924382 (1990-05-01), Shouda
patent: 5095426 (1992-03-01), Senta
patent: 5197138 (1993-03-01), Hobbs et al.
patent: 5237666 (1993-08-01), Suzuki et al.
patent: 5249278 (1993-09-01), Krauskopf
patent: 5265213 (1993-11-01), Weiser et al.
patent: 5319763 (1994-06-01), Ho et al.
patent: 5341500 (1994-08-01), Mayer et al.
patent: 5361348 (1994-11-01), Nakamoto
patent: 5367550 (1994-11-01), Ishida
patent: 5371894 (1994-12-01), DiBrino
patent: 5379301 (1995-01-01), Sato et al.
patent: 5386519 (1995-01-01), Nakamura et al.
patent: 5448705 (1995-09-01), Nguyen et al.
patent: 5493664 (1996-02-01), Doi
patent: 5530804 (1996-06-01), Edgington et al.
patent: 5533192 (1996-07-01), Hawley et al.
patent: 5564028 (1996-10-01), Swoboda et al.
Pentium.TM. Processor User's Manual, vol. 3: Architecture and Programming Manual, Intel Corporation 1994, pp. 14-1-14-27 and 17-1-17-9.
Intel 80960KB Programmer's Reference Manual, Intel Corporation 1988, pp. 10-1-10-8.

Affiliated with

Also associated with

Rating

Method and apparatus for providing address breakpoints, branch b does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for providing address breakpoints, branch b, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for providing address breakpoints, branch b will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-647038