Method and apparatus for providing access protection in an integ

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

39518801, G06F 1300

Patent

active

059206900

ABSTRACT:
A method and apparatus for providing access protection in an integrated circuit (10). In one embodiment access protection circuitry (11) includes access attribute bits (51) which are compared to the access attributes (68) of a memory (14) request. If a mismatch occurs, an access fault signal (52) is asserted. If access fault signal (52) is asserted and a selective reset bit (48) has selected a first memory protection mode, then signal generation circuitry (44) asserts a reset signal (58). Reset signal (58) may be used to initiate a hardware reset of data processor (10). If access fault signal (52) is asserted and a selective reset bit (48) has selected a second memory protection mode, then signal generation circuitry (44) asserts an exception occurred signal (60).

REFERENCES:
patent: 5375243 (1994-12-01), Parzych et al.
patent: 5586301 (1996-12-01), Fisherman et al.
patent: 5809230 (1998-09-01), Pereira

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for providing access protection in an integ does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for providing access protection in an integ, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for providing access protection in an integ will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-905836

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.