Oscillators – With frequency adjusting means – With voltage sensitive capacitor
Patent
1998-01-29
1999-10-12
Mis, David
Oscillators
With frequency adjusting means
With voltage sensitive capacitor
331158, 331175, 331177V, 331179, H03B 504, H03B 536
Patent
active
059660546
ABSTRACT:
A method that includes the steps of producing a digital code (104) based at least in part on an integrated circuit capacitance and adjusting a frequency of the clocking signal in response to the digital code (106). A method that includes the steps of in a first mode of operation, producing a fixed frequency clocking signal, the fixed frequency clocking signal having a frequency tolerance less than 20 units per million and, in a second mode of operation, producing a variable frequency clocking signal, the variable frequency clocking signal having a frequency variability range greater than 200 units per million. An apparatus for providing a clocking signal includes a tuner circuit (12) and an oscillator circuit (16) responsive to the tuner circuit (12). The tuner circuit (12) is responsive to a clock signal source (38), an integrated circuit capacitance, and a reference resistor (18). The tuner circuit (12) produces a digital code signal. (22) The oscillator circuit (16) includes at least one adjustable integrated circuit capacitor (30, 32) responsive to the digital code signal (22) and is capable of producing the clocking signal.
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Cave Michael D.
Fong Joseph C.
May Michael R.
Mis David
Motorola Inc.
Toler Jeffrey G.
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