Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-04-30
2009-02-03
Dinh, Son T (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185240, C365S185300
Reexamination Certificate
active
07486568
ABSTRACT:
Charge trapping memory cells are protected from over-erasing in response to an erase command. For example, in response to an erase command, one bias arrangement is applied to program charge trapping memory cells, and another bias arrangement is applied to erase the charge trapping memory cells, such that the charge trapping memory cells have a higher net electron charge, in the erased state than i.n the programmed state. In another example, an integrated circuit with an array of charge trapping memory cells has logic which responds to an erase command by applying similar bias arrangements to the charge trapping memory cells. In a further example, such an integrated circuit is manufactured.
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Liao Yi Ying
Lu Tao Cheng
Tsai Wen Jer
Yeh Chih Chieh
Dinh Son T
Haynes Beffel & Wolfeld LLP
Macronix International Co. Ltd.
Nguyen Hien N
Suzue Kenta
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