Method and apparatus for programming/erasing a non-volatile...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185190

Reexamination Certificate

active

11290321

ABSTRACT:
An integrated circuit (10) having non-volatile memory (NVM) (14) includes a threshold selector (28) which selects a first one of a plurality of read current/voltage thresholds during a first portion of a program/erase cycle, and which selects a second one of a plurality of read current/voltage thresholds during a second portion of said program/erase cycle, wherein the first one of a plurality of read current/voltage thresholds and the second one of a plurality of read current/voltage thresholds are different. The first portion of the program/erase cycle occurs in time before the second portion of the program/erase cycle. The second one of the plurality of read current/voltage thresholds is less than the first one of the plurality of read current/voltage thresholds.

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patent: 2002/0114185 (2002-08-01), Blyth et al.
patent: 2003/0218920 (2003-11-01), Harari

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