Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2007-11-06
2007-11-06
Elms, Richard T. (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S185110, C365S185240
Reexamination Certificate
active
11220733
ABSTRACT:
A non-volatile memory (NVM) that can be optimized for data retention or endurance is divided into portions that are optimized for one or the other or potentially some other storage characteristic. For the portion allotted for data retention, the memory cells are erased to a relatively greater extent. For the portion allotted for high endurance, the memory cells are erased to a relatively lesser extent. This is conveniently achieved by simply raising the level of the current reference that is used to determine if a cell has been sufficiently erased for the high data retention cells. The higher endurance cells thus will typically receive fewer erase pulses than the memory cells for high data retention. The reduced erasing requirement for the high endurance cells results in overall faster erasing and less stress on the high endurance cells as well as on the circuitry that generates the high erase voltages.
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Hardell Andrew W.
Niset Martin L.
Clingan, Jr. James L.
Elms Richard T.
Freescale Semiconductor Inc.
Hill Susan C.
Nguyen N
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