Coded data generation or conversion – Digital code to digital code converters – Programmable structure
Reexamination Certificate
1999-05-12
2001-05-15
Pierre, Peguy Jean (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Programmable structure
C323S304000
Reexamination Certificate
active
06232893
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to memory used to configure a programmable integrated circuit and specifically a configuration memory having a programmable voltage regulator.
2. Description of the Related Art
A programmable logic device (PLD) is a programmable integrated circuit that allows the user of the circuit, using software control, to customize the logic functions the circuit will perform. The logic functions previously performed by small, medium, and large scale integration integrated circuits can instead be performed by programmable logic devices. When a typical programmable logic device is supplied by an integrated circuit manufacturer, it is not yet capable of performing any specific function. The user, in conjunction with software supplied by the manufacturer or created by the user or an affiliated source, can configure the PLD to perform the specific function or functions required by the user's application. Typically, a configuration memory includes information in the form of stored configuration data bits to configure the PLD. The PLD then can function in a larger system designed by the user just as though dedicated logic chips were employed. For the purpose of this description, it is to be understood that a programmable logic device refers to once programmable as well as reprogrammable devices.
The programmable logic device, as with substantially all integrated circuits, are formed using well known photolithographic processes. As is known in the art, a photolithographic process may be characterized by the smallest geometry that can be repeatedly resolved by that technology. By way of example, some photolithographic processes are capable of resolving geometries as low as 1 micron, whereas other processes are capable of resolving geometries as low as 0.35 microns or smaller.
The capability of conventional photolithographic processes to resolve smaller and smaller geometries provides integrated circuit designers with the capability of designing ever more complex circuits in ever smaller size (i.e., the circuit density increases with the square of the characteristic length of the process). It is therefore highly advantageous to use photolithographic processes capable of resolving the smallest geometries. One advantage to using photolithographic processes capable of producing finer line widths is that more integrated circuits, in the form of die, can be put on a single semiconductor wafer, thereby producing greater yield per wafer with the attendant reduction in manufacturing costs.
However, any integrated circuit having a characteristic length finer than 0.5 microns must use a circuit supply voltage (referred to in some cases as TTL voltage or as VCC) less than 5 volts. This is due primarily to the reduction in breakdown voltages between adjacent structures due to the reduced distances between critical structures in the integrated circuit. Typically, as the geometries the applied supply voltage for integrated circuits with geometries less than 0.5 microns is approximately 3.3 volts.
This change in the supply voltage for integrated circuits produced using different photolithographic processes destroys what heretofore has been transparent to the integrated circuit end user. More particularly, the change from 1.0 micron to 0.65 micron, for example, was transparent to the integrated circuit end user since the TTL voltage is 5 volts for either integrated circuit. However, the same circuit fabricated in a 0.35 micron technology requires a reduction in the supply voltage to approximately 3.3 volts. Thus the change from 0.65 micron device to the same circuit fabricated in 0.35 micron technology requires substantial investment in modifications for the end user or system manufacturer who uses the integrated circuit as a component in a system. Such modifications can include new power supplies, additional power supplies to supply power to devices requiring 5 volts, additional software to support the additional supply voltages, as well as the potential need to re-layout printed circuit boards (PCB), for example, to accommodate the new and/or additional power supplies and supply voltages.
By way of example,
FIG. 1
illustrates a conventional printed circuit board (PCB)
100
with a 5 volt power supply
102
. As part of the circuit incorporated therein, the PCB
100
includes a programmable logic device (PLD)
104
and a PLD
106
each requiring an operating supply voltage of 5.0 volts. Each of the PLDs
104
and
106
are connected to a configuration memory
108
by way of a configuration bit stream bus
110
arranged to carry a configuration bit stream. The configuration bit stream includes all configuration data stored in the configuration memory
108
required to fit a desired logic and/or memory function in the PLDs
104
and
106
. Typically, the configuration memory
108
is a serial memory device in that the configuration data stored therein is supplied to the bus
110
in a serial fashion. The power supply
102
supplies 5 volts to a power supply bus
112
connected to each of the PLDs
104
and
106
. In the example shown, since each of the PLDs included in the PCB
100
require 5 volts supply, the power supply bus
112
supplies both PLDs
104
and
106
.
Referring now to
FIG. 2
, a conventional PCB
120
having a PLD
122
a PLD
124
requiring a 3.3 volt power supply and a 5.0 volt power supply, respectively, is shown. The PCB
120
includes a configuration memory
126
connected to the PLD
122
and a PLD
124
by way of a bus
128
. Since the PLD
122
requires a 3.3 volt supply while the PLD
124
requires a 5.0 volt power supply, two power supplies
130
and
132
included in the PCB
120
supplies 3.3 volts and 5.0 volts, respectively. The 3.3 volt power supply
130
is connected to PLD
122
by way of a 3.3 volt power supply bus
134
and the 5.5 volt power supply
132
is connected to the PLD
124
by way of a 5.0 volt power supply bus
136
.
By requiring the use of two power supplies and two associated power supply busses to accommodate integrated circuits (such as PLDs) having different supply voltages, much valuable PCB real estate is wasted. In addition, the design and layout of the PCB is greatly complicated resulting in increased manufacturing and design costs. This additional cost reduces the incentives to upgrade customers with the latest technologies and results in lower profits and added time to market.
In view of the foregoing, it would be advantageous and therefore desirable to provide a configuration memory used for the programming of a programmable integrated circuit such as a PLD with the capability of providing any number of suitable supply voltages. In this way, any device formed using any photolithographic process can be transparently interchanged without substantial additional cost and use to the end user.
SUMMARY OF THE INVENTION
The present invention relates generally to a programmable voltage regulator used to convert a first voltage to a desired operating voltage. The invention provides for more efficient use of integrated circuits, such as programmable logic devices, fabricated with advanced process technologies.
In one aspect of the invention, a programmable voltage regulator is disclosed. The programmable voltage regulator is arranged to selectively provide a desired operating voltage based upon operating voltage configuration data. The programmable voltage regulator includes an operating voltage decoder arranged to receive and decode selected operating voltage configuration data. The programmable voltage regulator also includes a programmable voltage down converter connected to the operating voltage decoder by way of a data bus. The programmable voltage down converter is arranged to receive a first voltage at an input line and programmably convert the first voltage to the desired operating voltage at an output line based upon the decoded operating voltage configuration data.
In another aspect of the invention, a configuration memory arranged to provide a desired operating
Bielby Robert
Cliff Richard
Altera Corporation
Beyer Weaver & Thomas LLP
Jean Pierre Peguy
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