Boots – shoes – and leggings
Patent
1989-04-17
1990-05-15
Harkcom, Gary V.
Boots, shoes, and leggings
364745, G06F 738
Patent
active
049263706
ABSTRACT:
A method and apparatus for processing postnormalization and rounding in parallel in floating point arithmetic circuits. The fractional result of a floating point arithmetic operation is simultaneously passed to a normalized circuit and a round circuit, and the first two bit positions of the fractional result are examined. If the 2-bit format is 1.X the round circuit is activated; if the 2-bit format is 0.1X the fractional result is shifted left one position and the round circuit is activated; if the 2-bit format is in neither of the above formats the normalize circuit is activated. In no event is it necessary to activate sequentially the normalize circuit and the round circuit.
REFERENCES:
patent: 4528640 (1985-07-01), Criswell
patent: 4562553 (1985-12-01), Mattedi et al.
patent: 4758972 (1988-07-01), Frazier
patent: 4779220 (1988-10-01), Nukiyama
patent: 4796217 (1989-01-01), Takahashi et al.
Finney et al., "Rounding IEEE Floating Point Results", IBM Technical Disclosure Bulletin, vol. 27, No. 5, Oct. 1984, pp. 3138-3140.
Brown Jeffrey D.
Freerksen Donald L.
Hilker Scott A.
Stasiak Daniel L.
Harkcom Gary V.
International Business Machines - Corporation
Mai Tan V.
Sjoquist Paul L.
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