Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1995-06-07
2001-09-11
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S754090, C324S765010
Reexamination Certificate
active
06288561
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention:
The present invention relates to test equipment and more particularly to equipment for probing, testing, burn-in, repairing, programming and binning of integrated circuits.
2. Description of the Related Art:
In conventional semiconductor equipment technologies, separate pieces of equipment are required to test, burn-in, repair, program and bin integrated circuits (ICs). Integrated circuits that are in wafer form are tested or screened for packaging using a tungsten needle probe card, wafer positioning equipment called a prober and automatic test equipment (ATE) which supplies test signals to the probe card and determines the validity of any output signals. A probe card is a connector that provides a mechanical means for making a temporary contact to the contact pads on an IC for the purpose of testing the IC. The probe card may contact only a single die, but it may typically contact as many as eight or more dice if the dice consist of memory ICs. A die typically consists of one IC; however, it may include a plurality of ICs. Conventional probe cards do not provide the capability of contacting all the dice on a wafer at once.
An IC is typically burned-in and speed-graded prior to its use or sale. Burn-in of circuit devices requires many hours of testing the devices under stressing temperature and electrical conditions. An IC is burned-in to lower the possibility that it will fail after it is inserted into an electronic assembly such as a Multi-Chip Module (MCM) or printed circuit board (PCB) of other ICs. Burn-in of an IC is performed typically after the IC is in packaged form. Burn-in fixtures for processing a die before packaging, so called bare die burn-in, are beginning to become available. Whether an IC is in packaged form or in die form, a separate piece of equipment is used to burn-in an IC. After an IC has been burned-in, it is speed-graded or binned using automatic test equipment. Binning is a process that sorts ICs according to their performance characteristics.
When an IC is in wafer form, and it contains shorts that disrupt the functionality of the IC, it may be repaired by removing portions of a deposited layer (e.g., a polysilicon layer or an aluminum metal layer). A laser cutting machine is typically used to perform the circuit repair. If an IC is a memory circuit array, yet another machine is required to program the memory circuit array by fusing or anti-fusing circuits within the memory circuit array. Subsequent to repair of an IC, the IC must be tested again.
It would be advantageous, and is therefore an object of the present invention to provide a single piece of equipment that can perform all of the functions mentioned above that are previously done by separate pieces of equipment to reduce capital equipment expense and the number of steps required for IC burn-in, testing, repairing and/or programming.
SUMMARY OF THE INVENTION
The present invention provides a single gas tight system that can perform multi-functions including reducing the thickness of oxides on contact pads and probing, testing, burn-in, repairing, programming, marking and binning of integrated circuits. A system according to one embodiment of the present invention includes: (a) a gas tight chamber having (1) one or a plurality of modules each having a holding fixture, a wafer, a probing device, other processing device such as a die inking or repairing device, an electronic circuit board, and a thermal control device, (2) a gas source for supplying non-oxidizing gases such as nitrogen and hydrogen into the chamber, (3) a handler for moving the wafers and the probing or other processing devices, and (b) a computer coupled to the chamber for controlling and communicating with the handler, the temperature control devices, the holding fixtures, the probing and other processing devices.
A holding fixture holds a wafer having integrated circuits and aligns the wafer to a probing device or other processing device. An integrated circuit has a plurality of conductive contact portions, typically referred to as contact, I/O or bond pads, that are couplable to probe points of the probing device. A temperature control device is used to heat the wafer during an oxide reduction process. When hydrogen is present in the chamber and the wafer is heated, the oxides on the wafer combine with hydrogen to form water vapor, thus reducing the thickness of the oxides. The temperature control device may also be used to heat or cool the wafer during burn-in of the wafer.
A probing device can have multiple probe points or a single probe point. the probing device can be a full-wafer probing device having active switching logic circuits to allow controlled access to each of the integrated circuits on a after, and optionally, generate some or all of the test signals required for testing the die.
The computer can generate a computer database with the various status information for every circuit processed by wafer and on-wafer site location. The database can provide timely performance distribution statistics and physical distribution statistics to the circuit manufacturing engineers or process engineers to allow adjustments to be made to the manufacturing process. By using the database, processing steps that are slowly going out of specification and affecting product quality can be corrected. Thus, the capability of near-real time adjustments to the manufacturing process will allow savings by reducing the number of products that do not satisfy specifications.
The present invention allows a single semiconductor test and circuit configuration machine to perform any or all of the following: (a) reducing the thickness of oxides on contact pads of integrated circuits on a wafer by supplying a first non-oxidizing gas such as nitrogen into the chamber, heating the contact pads, and supplying a second non-oxidizing gas such as hydrogen into the chamber so that the oxides can combine with hydrogen to form water vapor, (b) probing the contact pads using a probing device, (c) testing the functionality of the integrated circuits, (d) burning-in the integrated circuits for a predetermined period of time over a predetermined range of temperature with predetermined temperature rate of change and electrical conditions, (e) generating test vector data and analyzing data collected from the integrated circuits, (f) repairing the integrated circuits, (g) programming the integrated circuits by fusing or antifusing specific circuits within the integrated circuits, (h) marking or printing on the wafer, (i) binning the integrated circuits according to their performance characteristics, and (j) collection of a database for immediate feedback to the manufacturing process.
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patent
ELM Technology Corporation
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kobert Russell M.
Metjahic Safet
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