Method and apparatus for preventing performance of a critical op

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G06F 1546

Patent

active

047470488

ABSTRACT:
An embedded control system executed by a microprocessor prevents, the performance of a critical operation unless selected control conditions are properly satisfied. A polite request to perform the critical operation may require the setting of various multi-bit flags indicative of a normal polite entry and does require the issuance of a uniquely identifiable action. A protection circuit distinguishes the uniquely identifiable action and initiates checks of the control conditions. These control conditions may include not only the values of the various multi-bit flags, but other checks indicative of normal operation. If the controlling conditions are met a confirmation stimulus, precisely timed relative to the uniquely identifiable action, satisfies the protection circuit, which then enables the appropriate hardware to perform the critical operation. The protection circuit monitors various signals of the embedded system, and any of a variety events, if detected, will immediately terminate the enablement of the critical operation. These principles are applied to the protection of calibration constants stored in the non-volatile memory of a digital multimeter controlled by an embedded system.

REFERENCES:
patent: 4628434 (1986-12-01), Tashiro et al.

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