Method and apparatus for predicting memory dependence using stor

Details Method and apparatus for predicting memory dependence using stor Method and apparatus for predicting memory dependence using stor

1998-06-24

2000-08-22

Treat, William M.

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

G06F 938

Patent

active

06108770&

ABSTRACT:
A method of scheduling program instructions for execution in a computer processor comprises fetching and holding instructions from an instruction memory and executing the fetched instructions out of program order. When load/store order violations are detected, the effects of the load operation and its dependent instructions are erased and they are re-executed. The load is associated with all stores on whose data the load depends. This collection of stores is called a store set. On a subsequent issuance of the load, its execution is delayed until any store in the load's store set has issued. Two loads may share a store set, and separate store sets are merged when a load from one store set is found to depend on a store from another store set. A preferred embodiment employs two tables. The first is a store set ID table (SSIT) which is indexed by part of, or a hash of, an instruction PC. Entries in the SSIT provide a store set ID which is used to index into the second table, which for each store set, contains a pointer to the last fetched, unexecuted store instruction.

REFERENCES:
patent: 5509135 (1996-04-01), Steely, Jr.
patent: 5615350 (1997-03-01), Hesson et al.
patent: 5781752 (1998-07-01), Moshovos et al.
patent: 5987595 (1999-11-01), Yoaz et al.
Tyson, G.S., and Austin, T.M., "Improving the Accuracy and Performance of Memory Communication Through Renaming," Proc. 30.sup.th Annual IEEE/ACM International Symposium on Microarchitecture, pp. 218-227 (Dec. 1-3, 1997).
Moshovos, A. et al., "Dynamic Speculation and Synchronization of Data Dependences," Proc. 24.sup.th Annual International Symposium on Computer Architecture, consisting of 13 pages (1997).
Moshovos, A. et al., "Streamlining Inter-operation Memory Communication via Data Dependence Prediction," Proc. Micro-30, consisting of 11 pages (Dec. 1-3, 1997).

Affiliated with

Also associated with

Rating

Method and apparatus for predicting memory dependence using stor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for predicting memory dependence using stor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for predicting memory dependence using stor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-595035